Hello
I am going to design clock solution by using LMK04806B and the target mode is figure2-3 Single PLL Mode - page 5 of LMK04806B data sheet.
I am a beginner to use this device so that want to verify my design is OK or Not.
Configuration is below and configuration file of Codeloader is attached.
Additionally, if the below configurations are effective How much power consumption it needs.
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Reference Frequency: 10MHz
100MHz: LVDS x 1 ch
100MHZ: LVPECL x 2 ch
200MHz: LVDS x 3 ch
200MHz: LVPECL x 1ch
400MHz: LVDS x 3ch
10MHz: LVDS x 1ch
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Reference Frequency: 200MHz
100MHz: LVDS x 1 ch
100MHZ: LVPECL x 2 ch
200MHz: LVDS x 3 ch
200MHz: LVPECL x 1ch
400MHz: LVDS x 3ch
10MHz: LVDS x 1ch
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Thanks and Best Regards