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LMK04828B - Programming Sequence

Hello,

My customer have some questions about LMK04828B.

They are going to program as follows.

  I wrote their questions in a blue character.

  We referred to "9.5.1 Recommended Programming Sequence" of datasheet P.51.

  We referred to "9.3.2.1.1 Setup of SYSREF Example" of datasheet P.37. 

(1) Device Power ON

(2) wait for POR <--- [Q1] Is it necessary ? How much time does it need ?

(3) Programming register 0x000 with RESET = 1.   

(4) wait for reset <--- [Q2] Is it necessary ? How much time does it need ?

(5) Programming registers in numeric order from 0x000 to 0x165.

(6) Programming registers 0x17C and 0x17D.

(7) Programming registers 0x166 to 0x1FFF.

(8) wait for Calibration & PLL Lock <--- [Q3] Is it necessary ? How much time does it need ?

(9) setup of SYSREF

  (9-1) Establish deterministic phase relationships between SYSREF and Device Clock for JESD204B.

  (9-2) Disable SYNC from resetting these dividers.

  (9-3) Release reset of local SYSREF digital delay.

  (9-4) Set SYSREF operation.

(10) Complete

[Q4] Is that sequence correct ?

 

Best Regards,

Hiroshi Katsunaga

  • Hiroshi Katsunaga said:
    (2) wait for POR <--- [Q1] Is it necessary ? How much time does it need ?

    POR always happens.  1 us is a good amount of time to wait after part achieves 3.15 V.  You do want to ensure you wait until after POR to ensure that your programming doesn't get overwritten by the POR.

    Hiroshi Katsunaga said:
    (4) wait for reset <--- [Q2] Is it necessary ? How much time does it need ?


    It is recommended.  Simply program Register 0 with reset = 1, then reset = 0.  No extra waiting time.

    Hiroshi Katsunaga said:
    (8) wait for Calibration & PLL Lock <--- [Q3] Is it necessary ? How much time does it need ?

    If you are using the internal VCO, there is a VCO calibration time as apart of PLL lock.  Digital calibration time depends some on OSCin frequency.  Digital lock detect pin can report when device is locked.  I'll check to see what more info I can find for you on this topic, like how long the digital lock detect time is.

    Hiroshi Katsunaga said:
    [Q4] Is that sequence correct ?

    This sequence appears correct.  Please also find the attached reference for more help in setting up SYSREF.  note that SDCLKoutY_PD = 0 in step 1d on page 37.  We will be updating this. 3731.Key Points to setting up SYSREF on LMK0482x.pdf

    73,

    Timothy

  • Hello, Timothy-san,

    Thank you for your fast response.

    I understood your comment.

    And thank you for the attached reference.

    That is very helpful for us.

    --------------------------------------------------------------------------

    I show additional customer information as follows.

    Their OSCin frequency is 122.88MHz. 

    Can you check that how much time the digital lock detect time is ?

    --------------------------------------------------------------------------

    Best Regards,

    Hiroshi Katsunaga

  • Hello Timothy-san,

    How is the answer to previous question ?

    --> Can you check that how much time the digital lock detect time is ?

    And, They has an additional question.

    [Q]

    Is the waiting time not necessary after programming registers 0x17C and 0x17D ?

    Best Regards,

    Hiroshi Katsunaga