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CDCM6208
Related Posts

  • Forum Post: Re: How to generate fine frequency tunning (shift) in LMK04XXX or CDCEXXXX?

    Fritz
    Fernando, by the way, we have the CDCM6208 sampling now that has a fractional output divider with 20-bit resolution. Practically, this allows you frequency hopping with a resolution of 1/(2^20). This is still more coarse than your requirement, but getting pretty close. If you are interested to see...
    on Mar 4, 2012

  • Forum Post: CDCM6208 PLL lock indicator

    Cameron Patterson
    I've read a couple places that when the CDCM6208 chip has achieved PLL lock it asserts the STATUS0 or STATUS1 pin high, but I was wondering if there's a different way to go about that. I'm using an MSP430 to program the chip through SPI and I'd rather not use a separate pin just for the...
    on Jul 2, 2012

  • Forum Post: RE: CDCE62005 - Output Frequency Generation

    veerasamy v
    In CDCM6208 datasheet it is mentioned that, while using this device to clock ADC, there will be SNR degradation when the IF frequency is above 100MHz. Our IF is around 160MHz. Is it recommendable to use CDCM6208 in this case? Or is the SNR degradation common for all clock generators?
    on Jan 28, 2013

  • Forum Post: RE: CDCM61002/CDCM61004

    eli
    Hi, -Which is giving better performance 6208 or 6205 ? -Can you recommend for a chip one input one output LVPECL clock devider by 2 or 4 ? -Can you recommend for LVPECL with 2input and two banks of 3 LVPECL outputs Buffer ? B.regards Eli
    on Apr 7, 2013

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