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cdce925
Related Posts

  • Forum Post: Re: Reprogramming PLL when it provides CPU clock

    mapefer3
    The CDCE706 allows changing programmatically the output frequency via I2C, but to change from Frequency1 to Frequency2 avoiding intermediate frequencies or glitches, is not as straight forward as using the CDCE925, CDCE937, CDCE949, CDCE913. If in order to change from Frequency1 to Frequency2 only...
    on May 28, 2010

  • File: Utilizing SSC to overcome EMI problems - TI clocks and Timers presentation

    Fritz
    A presentation on how to overcome EMI ultilizing SSC in particular. uploaded:10/18/2010 by Fritz
    on Oct 19, 2010

  • Forum Post: Re: 0.8V p-p "clipped sinewave" input to CDCE9xx?

    mapefer3
    Thank you for posting this interesting question. It is possible to use the CDCE9xx series as a clock generator (with PLL on) by connecting a TCXO in the way described in the application notes you are referring to. The Rf internal in the CDCE9xx series is approx 500kOhms, therefore it is not needed...
    on Apr 18, 2011

  • Forum Post: CDCE925 Technical Request- datasheet

    Alesea
    Hi, Can you please help my customer? Here is the original request: *** I have designed in your CDCE925 in a new product, and am about to start programming it. CDCE925 datasheet pages 13-14 I2C communication are confusing. On Figure 11 it looks like Byte Count N is sent from slave to master. It...
    on Sep 21, 2011

  • Forum Post: Re: CDCE925 Technical Request- datasheet

    mapefer3
    >>In the block read (Figure 11) the Byte Count N is coming from the slave. The byte count is stored in the slave: byte 6, bits 7:1 (page 16 of CDCE925 datasheet). Also, the "A" for ack is not specified as 0 or 1 in the communication. >>A is acknowledgment, the slave will...
    on Sep 21, 2011

  • Forum Post: Re: CDCE913 not locking, what am I doing wrong?

    Cypher Punks
    Just a follow-up: I checked that the ClockPro software calculated the same register contents as I did. While using it, I noticed that it tended to add common factors to M/N to make the numbers as large as possible. (At the register level, this amounts to scaling M and R by the same value.) I tried...
    on Oct 8, 2011

  • Forum Post: CDCE925 SSC modulation rate

    reginald conley
    Hello I have the CDCE925 device operating in SSC mode (using 0.5%) - what I would like to know is what is the actual modualtion rate of the SSC?
    on Jan 30, 2012

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