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Related Posts

  • Forum Post: CDCE72010EVM clock generator kit

    Niccolo` Battezzati
    Hi all, I just bought a CDCE72010EVM evaluation module for the CDCE72010 device. I need to generate an LVCMOS output between 0 V and 3.3 V (or at least 0-1.5 V) to clock a design implemented in an Actel ProASIC3 FPGA, on a commercial board (ProAsic3 Evaluation Board). How shall I do? I can...
    on Jun 11, 2009

  • Forum Post: Re: CDCE62005 LVCMOS TERMINATION PROBLEM

    Rolan Tang
    Sid, you mean you use series resistance successfully with cdce62005 LVCMOS INPUT/OUTPUT? T&R, Rolan
    on May 5, 2010

  • Forum Post: Clock generator for 192KHz USB DAC

    Mahendrakumar Reddy Ippagunta
    I am searching for 192Fs or 128Fs MCLK clock generators for the 192KHz I2S DAC and came across PLL170x from TI. The datasheets of these parts say that they can generate 256Fs or 384Fs for 96KHz sampling rate and do not say anything about support for 192KHz. Can I configure these clock generators for...
    on Sep 29, 2010

  • Forum Post: Convert 3.3V clock into 1.2V for DSP clock

    jun yang46050
    Hi, An oscillator output 3.3V clock. However a DSP clock input is 1.2V. What kind of device is good for gluing them together? Is there any reference designe for it? Regards, Jun
    on Oct 7, 2010

  • Forum Post: CDCM61001 clock generator

    M-Dizzle
    Hi, I'm looking at the CDCM61001 clock generator (also 61002 and 61004) and I have a query over the dc rating of ferrite bead (Ref Figure 19 from CDCM61001 datasheet). This will be connected to the analog supplies (VCC_PLL1, _PLL2 and _VCO), but I'm not sure what current I should rate this...
    on Nov 2, 2010

  • Forum Post: Extreme variation in Source impedance: CDCLVC1104

    Brad Nielsen
    I am using the CDC_LVC1104 in the my design. By my IBIS sims, it looks like the driver swings from 30 Ohms to 70 depending on process variations. That does make guaranteeing a decent waveform just about impossible as this simulation shows (paste didn't work on forum website, -sorry). This...
    on Dec 6, 2010

  • Forum Post: Where to place Termination: AC coupled LVPECL CDCLVP1102

    Alfred Key
    I am using the CDCLVP1102 (same family as the CDCLVP1204) to drive PCIexpress 100MHz reference to the input clock pins of Xilinx Virtex6 device. I have two questions: Where should I locate the AC coupling caps; near the source or near the target? Are the 50ohm Terminations after the AC caps...
    on Mar 28, 2011

  • Forum Post: Undefined Jitter spec in CDCLVP1204 datasheet; Tsk,P

    Alfred Key
    The CDCLVP1204 datasheet give values for Part-to-part skew Tsk,PP and Output skew Tsk,O and later defines them in the data sheet in timing diagram figure. It also gives value for Pulse skew Tsk,P and calls it Crossing-point-to-crossing-point-distortion but does not define further it in the data sheet...
    on Mar 28, 2011

  • Forum Post: CLOCKING FOR PCI EXPRESS

    eli
    Please advise updated status for clocking solution for PCI Express. Do we have compatible device with IDT,9DB106?
    on Aug 23, 2011

  • Forum Post: Clock Yynthesizer

    Wen73818
    Is there a lower jitter clock synthesizer can generate 200MHz or 300 MHz LVDS or LVPECL clock from a single source (OSC, LVCOMS or diff 100MHz clock). I want the synthesizer being set up by external pins (PU/PD resistors) instead of programming.
    on Sep 3, 2011

  • Forum Post: CLOCKing solution

    eli
    looking for a clocking solution for input of 155.52M with 5-8 lvpecl outputs of 156.25M.Is the LMK03000, meet below requirements? Any other possible solutionwithout integtated VCO from NSC ?
    on Sep 28, 2011

  • Forum Post: Re: CLOCKing solution

    eli
    Thanks! Can you asvise the other option deviceds/solution?
    on Sep 29, 2011

  • Forum Post: BQ32000 clock source

    Yogesh Palkar
    Hi, I have used BQ32000 in a circuit. I have used a 32.768kHz crystal as suggested. Is there any need to connect capacitors to the crystal? Or will the crystal simply work alone? Currently I have connected the crystal alone and the Oscillator flag bit is set to 1. If needed, what value of crystal...
    on Mar 29, 2012

  • Forum Post: Re: BQ32000 clock source

    Yogesh Palkar
    Hello Ryan Kehr sir, The crystal that is suggested is not available locally. So I have used a 32.768kHz crystal that is available locally. In general for these crystals we use a ceramic low value capacitor. As in for a microcontroller, we connect a 33pF capacitor. Now is capacitor connection necessary...
    on Mar 29, 2012

  • Forum Post: Re: SSTE32882 Operation in Mirror Mode

    Mauricio Cabrera Molloja
    Dear Mr. Christian Schmoeller, I've been doing a research of new devices and as a result I am using the SN74SSQEA32882 but I can hardly understand how it works. Could it be possible to get the truth table of this device? Best regards, Mauricio Cabrera Molloja
    on Apr 4, 2012

  • Forum Post: lmk00301 sin input

    gilad hochman
    hey i need one of the input of the lmk00301 will be sinus single ended can i do it ? if not what in need to do to convert it?
    on Jan 1, 2013

  • Forum Post: Programming frequency on CDCE913

    Fredrik Lundqvist
    Hi, I'm trying to change the sample frequency for an ADC example project in the OMAP-l138/C6748 EVM kit. This kit includes the CDCE913 clock to set the ADC sample frequency. There is one central function that changes the clock frequency, namely by the call CDCE913_setOutput(cdce913_output_2,...
    on Mar 12, 2013

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