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TVP7002: Problem with TVP7002 . TVP7002 not working

Part Number: TVP7002

Please help me !!!

I am designing a custom board with DM8168 vs decoder TVP7002.
I can control TVP7002 throught I2c 
But TVP7002 can not detect video modes when query_dv_preset, No SOGOUT.

I am using ezsdk ezsdk_dm816x-evm_5_05_02_00
This my Schematics with tvp7002tvp7200_pcb.pdf

3 Replies

  • I suggest you ask this question to the DM81xx forums since I can't comment on the software interactions with the TVP7002.

    The TVP7002 though needs to be configured exactly to the format it is receiving in the analog domain so is very dependent on the software stack to determine and configure the mode correctly.

    I did notice one thing in your schematics though... You should not have 75R resistors present for R60, R62 and R86. These resistors will end up dividing the signal amplitude by 2 and also presenting the wrong impedance to the analog video source. replace these resistors with 0R resistors.

  • In reply to Steve Clynes:

    Hi Steve.
    Thanks for reply !
    This is my all values of Register TVP7002. I am using for video mode 720p 3 wire

    Reg Name:TVP7002_CHIP_REV Value:0x02
    Reg Name:TVP7002_HPLL_FDBK_DIV_MSBS Value:0x67
    Reg Name:TVP7002_HPLL_FDBK_DIV_LSBS Value:0x20
    Reg Name:TVP7002_HPLL_CRTL Value:0xa0
    Reg Name:TVP7002_HPLL_PHASE_SEL Value:0x16
    Reg Name:TVP7002_CLAMP_START Value:0x32
    Reg Name:TVP7002_CLAMP_W Value:0x20
    Reg Name:TVP7002_HSYNC_OUT_W Value:0x60
    Reg Name:TVP7002_B_FINE_GAIN Value:0x00
    Reg Name:TVP7002_G_FINE_GAIN Value:0x00
    Reg Name:TVP7002_R_FINE_GAIN Value:0x00
    Reg Name:TVP7002_B_FINE_OFF_MSBS Value:0x80
    Reg Name:TVP7002_G_FINE_OFF_MSBS Value:0x80
    Reg Name:TVP7002_R_FINE_OFF_MSBS Value:0x80
    Reg Name:TVP7002_SYNC_CTL_1 Value:0x58
    Reg Name:TVP7002_HPLL_AND_CLAMP_CTL Value:0x6a
    Reg Name:TVP7002_SYNC_ON_G_THRS Value:0x5d
    Reg Name:TVP7002_SYNC_SEPARATOR_THRS Value:0x47
    Reg Name:TVP7002_HPLL_PRE_COAST Value:0x00
    Reg Name:TVP7002_HPLL_POST_COAST Value:0x00
    Reg Name:TVP7002_SYNC_DETECT_STAT Value:0x6d
    Reg Name:TVP7002_OUT_FORMATTER Value:0x47
    Reg Name:TVP7002_MISC_CTL_1 Value:0x11
    Reg Name:TVP7002_MISC_CTL_2 Value:0x00
    Reg Name:TVP7002_MISC_CTL_3 Value:0x00
    Reg Name:TVP7002_IN_MUX_SEL_1 Value:0x00
    Reg Name:TVP7002_IN_MUX_SEL_2 Value:0xc8
    Reg Name:TVP7002_B_AND_G_COARSE_GAIN Value:0x77
    Reg Name:TVP7002_R_COARSE_GAIN Value:0x07
    Reg Name:TVP7002_FINE_OFF_LSBS Value:0x00
    Reg Name:TVP7002_B_COARSE_OFF Value:0x10
    Reg Name:TVP7002_G_COARSE_OFF Value:0x10
    Reg Name:TVP7002_R_COARSE_OFF Value:0x10
    Reg Name:TVP7002_HSOUT_OUT_START Value:0x08
    Reg Name:TVP7002_MISC_CTL_4 Value:0x00
    Reg Name:TVP7002_B_DGTL_ALC_OUT_LSBS Value:0x00
    Reg Name:TVP7002_G_DGTL_ALC_OUT_LSBS Value:0xfb
    Reg Name:TVP7002_R_DGTL_ALC_OUT_LSBS Value:0xff
    Reg Name:TVP7002_AUTO_LVL_CTL_ENABLE Value:0x80
    Reg Name:TVP7002_DGTL_ALC_OUT_MSBS Value:0x16
    Reg Name:TVP7002_AUTO_LVL_CTL_FILTER Value:0x53
    Reg Name:TVP7002_RESERVED Value:0x08
    Reg Name:TVP7002_FINE_CLAMP_CTL Value:0x07
    Reg Name:TVP7002_PWR_CTL Value:0x00
    Reg Name:TVP7002_ADC_SETUP Value:0x50
    Reg Name:TVP7002_COARSE_CLAMP_CTL Value:0x00
    Reg Name:TVP7002_SOG_CLAMP Value:0x80
    Reg Name:TVP7002_RGB_COARSE_CLAMP_CTL Value:0x00
    Reg Name:TVP7002_SOG_COARSE_CLAMP_CTL Value:0x04
    Reg Name:TVP7002_ALC_PLACEMENT Value:0x5a
    Reg Name:TVP7002_RESERVED Value:0x18
    Reg Name:TVP7002_RESERVED Value:0x60
    Reg Name:TVP7002_MVIS_STRIPPER_W Value:0x03
    Reg Name:TVP7002_VSYNC_ALGN Value:0x10
    Reg Name:TVP7002_SYNC_BYPASS Value:0x00
    Reg Name:TVP7002_L_FRAME_STAT_LSBS Value:0x01
    Reg Name:TVP7002_L_FRAME_STAT_MSBS Value:0x20
    Reg Name:TVP7002_CLK_L_STAT_LSBS Value:0x00
    Reg Name:TVP7002_CLK_L_STAT_MSBS Value:0x00
    Reg Name:TVP7002_HSYNC_W Value:0x00
    Reg Name:TVP7002_VSYNC_W Value:0x01
    Reg Name:TVP7002_L_LENGTH_TOL Value:0x03
    Reg Name:TVP7002_RESERVED Value:0x04
    Reg Name:TVP7002_VIDEO_BWTH_CTL Value:0x01
    Reg Name:TVP7002_AVID_START_PIXEL_LSBS Value:0x47
    Reg Name:TVP7002_AVID_START_PIXEL_MSBS Value:0x01
    Reg Name:TVP7002_AVID_STOP_PIXEL_LSBS Value:0x4b
    Reg Name:TVP7002_AVID_STOP_PIXEL_MSBS Value:0x06
    Reg Name:TVP7002_VBLK_F_0_START_L_OFF Value:0x05
    Reg Name:TVP7002_VBLK_F_1_START_L_OFF Value:0x00
    Reg Name:TVP7002_VBLK_F_0_DURATION Value:0x1e
    Reg Name:TVP7002_VBLK_F_1_DURATION Value:0x00
    Reg Name:TVP7002_FBIT_F_0_START_L_OFF Value:0x00
    Reg Name:TVP7002_FBIT_F_1_START_L_OFF Value:0x00
    Reg Name:TVP7002_YUV_Y_G_COEF_LSBS Value:0xe3
    Reg Name:TVP7002_YUV_Y_G_COEF_MSBS Value:0x16
    Reg Name:TVP7002_YUV_Y_B_COEF_LSBS Value:0x4f
    Reg Name:TVP7002_YUV_Y_B_COEF_MSBS Value:0x02
    Reg Name:TVP7002_YUV_Y_R_COEF_LSBS Value:0xce
    Reg Name:TVP7002_YUV_Y_R_COEF_MSBS Value:0x06
    Reg Name:TVP7002_YUV_U_G_COEF_LSBS Value:0xab
    Reg Name:TVP7002_YUV_U_G_COEF_MSBS Value:0xf3
    Reg Name:TVP7002_YUV_U_B_COEF_LSBS Value:0x00
    Reg Name:TVP7002_YUV_U_B_COEF_MSBS Value:0x10
    Reg Name:TVP7002_YUV_U_R_COEF_LSBS Value:0x55
    Reg Name:TVP7002_YUV_U_R_COEF_MSBS Value:0xfc
    Reg Name:TVP7002_YUV_V_G_COEF_LSBS Value:0x78
    Reg Name:TVP7002_YUV_V_G_COEF_MSBS Value:0xf1
    Reg Name:TVP7002_YUV_V_B_COEF_LSBS Value:0x88
    Reg Name:TVP7002_YUV_V_B_COEF_MSBS Value:0xfe
    Reg Name:TVP7002_YUV_V_R_COEF_LSBS Value:0x00
    Reg Name:TVP7002_YUV_V_R_COEF_MSBS Value:0x10

    In Register TVP7002_SYNC_CTL_1 value=0x58, bit 3 and bit 4 is set. Active HSYNC is derived from the selected SOG input. But no signal output in SOGOUT. Seem TVP7002 not working, It is in state Power Down
  • In reply to Linh Nguyen15:

    Using the "TVP7002 setup files" from here check your configuration.

    How are you determining that the device is in a power down state? Have you checked the state of your PWDN and RESETB7002 signals by measuring the voltages on pins 70 & 71?

    I would also ask questions in the DM81xx forums since the drivers should be supported there.



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