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Part Number: ADS8326
My customer is considering ADS8326 and has questions about timing spec.
I would be grateful if you could advise.
Could you please see the figure and answer these questions.
(1) Is it possible to expand the Dclock?
(2)How much is the minimum CS high time?
I appreciate your great help in advance.
I will need to investigate to see if we can get some exact numbers, but maybe this will help.
1. DCLOCK can be as low as 24kHz, so the delay between CS going low and the first clock rising edge in this case is ~1/Fs, or 41.5uS. The datasheet only specifies a minimum setup time, tsucs of 20nS, and no maximum.
2. Assuming a maximum clock rate of 6MHz, and a minimum cycle time of 4uS, CS high in this case is a maximum of 4uS-22*167nS = 333nS.
The customer may want to consider the ADS8864. It is a similar device, but has a more flexible digital interface.
Precision ADC Applications
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In reply to Keith Nicholas:
In reply to Shinichi1:
Thank you for your reply.
I understand ADS8326 is directly using DCLOCK.
Colud you confirm the exact number of minimun CS High time.
I think it's a very helpful information for the customer, because he'd like to expand the DCLOCK when sample and make the clock faster when convert.
In this case, cs time affects the total sampling time.
I appreciate your great help and look forward to waiting your suggestion.
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