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ADC32RF45: Load/Store Offset Corrector Coefficients

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Replies: 8

Views: 238

Part Number: ADC32RF45

Hi,

In order to suppress spurs at certain frequencies, we use the offset corrector like the following way:

1) Make sure no signal on inputs.

2) Enable offset corrector and wait for sometime to collect enough data for estimation

3) Freeze corrector

4) Now ADC can receive signal without spurs.

Instead of doing this procedure every time, we would like to make the calibration at factory and store the coefficients. In that case, we will be able to calibrate the ADC  by only loading related coefficients without any extra calibration step (with no signal on input). Otherwise, while using the ADC in the field, at least for every startup, we need to apply a calibration procedure with no signal.

Is it possible to load/store offset coefficients?

Thanks,

Ozer

  • Hi Ozer
    Sorry for the delay. One of our ADC experts is reviewing this question. You should get a response today or Monday.
    Best regards,
    Jim B
  • In reply to Jim Brinkhurst84999:

    Hi Ozer,

    It should be possible to do factory calibration as you described. I'm checking with the design team for the procedure to read and write the offset corrector coefficients. I will verify it on an ADC32RF45EVM and update you.

    Regards,
    Vijay
  • In reply to Vijayendra Varma Siddamsetty:

    Hi Vijay,

    Thanks for the update. It's been a while and no answer, so we played around with the registers and reverse engineered some of the registers in page 0x61. We guess that registers at 0x08, 0x09, 0x10, 0x11, 0x0c and 0x0d may be related to DC offset settings. Of course without your procedure definition it's not easy to finalize, waiting for your update..

    Thanks,

    Özer

  • In reply to Ozer Ozaydin18:

    Hi Ozer,

    Please find the procedure below:

    At factory:

    1)      Power up and run complete device configuration exactly as it will be used in the field.

    2)      Wait for a few seconds for temperature to settle. (It is important for the temperature to be same as it will in the field for better correction performance)

    3)      Turn off input signal to the device.

    4)      Wait for at least 0.4 ms for the corrector to estimate internal offset.

    5)      Freeze offset estimation using the writes shown in the table below:

    SPI write/ Read

    Address

    Value

    Comment

    Write

    0x4004

    0x61

    Page select

    Write

    0x4003

    0x00

    Page select

    Write

    0x4002

    0x00

    Page select

    Write

    0x4001

    0x00

    Page select

    Write

    0x6068

    0xA2

    Freeze corrector for channel A

    Write

    0x4003

    0x01

    Page select

    Write

    0x6068

    0xA2

    Freeze corrector for channel B

     

    6)      Read coefficients as shown in the table below:

    SPI write/ Read

    Address

    Value

    Comment

    Write

    0x4004

    0x61

    Page select for channel A

    Write

    0x4003

    0x00

    Page select for channel A

    Write

    0x4002

    0x06

    Page select for channel A

    Write

    0x4001

    0x00

    Page select for channel A

    Read

    0x6050

    Save as c1

    Coefficient read register 1

    Read

    0x6051

    Save as c2

    Coefficient read register 2

    Read

    0x6052

    Save as c3

    Coefficient read register 3

    Read

    0x6053

    Save as c4

    Coefficient read register 4

    Read

    0x6054

    Save as c5

    Coefficient read register 5

    Read

    0x6055

    Save as c6

    Coefficient read register 6

    Read

    0x6056

    Save as c7

    Coefficient read register 7

    Read

    0x6057

    Save as c8

    Coefficient read register 8

    Read

    0x6058

    Save as c9

    Coefficient read register 9

    Read

    0x6059

    Save as c10

    Coefficient read register 10

    Read

    0x605A

    Save as c11

    Coefficient read register 11

    Read

    0x605B

    Save as c12

    Coefficient read register 12

    Read

    0x605C

    Save as c13

    Coefficient read register 13

    Read

    0x605D

    Save as c14

    Coefficient read register 14

    Read

    0x605E

    Save as c15

    Coefficient read register 15

    Read

    0x605F

    Save as c16

    Coefficient read register 16

    Write

    0x4003

    0x01

    Page select for channel B

    Read

    0x6050 to 0x605F

    Save as c17 to c32

    Coefficient read registers for channel B

     

     

    In the Field:

    1)      Power up and run complete device configuration.

    2)      Load offset correction coefficients into the device as shown in the table below:

    SPI write/ Read

    Address

    Value

    Comment

    Write

    0x4004

    0x61

    Page select for channel A

    Write

    0x4003

    0x00

    Page select for channel A

    Write

    0x4002

    0x05

    Page select for channel A

    Write

    0x4001

    0x00

    Page select for channel A

    Write

    0x6000

    c1

    Coefficient write register 1

    Write

    0x6001

    c2

    Coefficient write register 2

    Write

    0x6002

    c3

    Coefficient write register 3

    Write

    0x6003

    c4

    Coefficient write register 4

    Write

    0x6004

    c5

    Coefficient write register 5

    Write

    0x6005

    c6

    Coefficient write register 6

    Write

    0x6006

    c7

    Coefficient write register 7

    Write

    0x6007

    c8

    Coefficient write register 8

    Write

    0x6008

    c9

    Coefficient write register 9

    Write

    0x6009

    c10

    Coefficient write register 10

    Write

    0x600A

    c11

    Coefficient write register 11

    Write

    0x600B

    c12

    Coefficient write register 12

    Write

    0x600C

    c13

    Coefficient write register 13

    Write

    0x600D

    c14

    Coefficient write register 14

    Write

    0x600E

    c15

    Coefficient write register 15

    Write

    0x600F

    c16

    Coefficient write register 16

    Write

    0x4003

    0x01

    Page select for channel B

    Write

    0x6000 to 0x600F

    c17 to c32

    Coefficient write registers for channel B

     

    3)      Enable loading external offset correction coefficients using the writes shown in the table below:

    SPI write/ Read

    Address

    Value

    Comment

    Write

    0x4004

    0x61

    Page select

    Write

    0x4003

    0x00

    Page select

    Write

    0x4002

    0x00

    Page select

    Write

    0x4001

    0x00

    Page select

    Write

    0x6069

    0x01

    Enable loading external offset coefficients for channel A

    Write

    0x4003

    0x01

    Page select

    Write

    0x6069

    0x01

    Enable loading external offset coefficients for channel B

     

    Regards,

    Vijay

  • In reply to Vijayendra Varma Siddamsetty:

    Hi Vijay,

    Thanks for the info, however it seem that after the ADC is initialized the saved coefficients doesn't work correctly. It is better, but not enough. Please check the averaging spectrum outputs (half of real spectrum) below for each step. ADC is in 14bit real mode, 1.5GSPS sampling rate, 2048 points fft average around 100ms.

    1-Initial spectrum after ADC init, notch filter disabled.

    2- corrector block enabled, not frozen

    3- after corrector frozen

    4- save and load coefficients as described. Without ADC re-init, it's OK. We're sure that coefficients are really loaded, we made tests with incorrect coefficients and saw the difference.

    5- reinitialize ADC, corrector disabled initially.

    6- enable corrector block

    7- load previously saved coefficients. as you can see, it's better than without correction, but not acceptable.

    We repeated this scenario many times but after ADC reinitialized (soft reset, without poweroff-on, without temperature/environment change) the coefficients seemed to be not working correctly. As mentioned above, if you just save and load coefficients without reinit ADC, it's working fine.

    Thanks,

    Ozer

  • In reply to Ozer Ozaydin18:

    Hi,

    Do you have any updates about the issue above? It's really not a good option to ask our customer handle calibration in field.. Thanks,

    Ozer

  • In reply to Vijayendra Varma Siddamsetty:

    Details above.

  • In reply to Ozer Ozaydin18:

    Hi Ozer,

    Sorry for the delay. Your results are as expected by design. I have verified that spurs at multiples at Fs/4 better than -60 dBFs when coefficients from a previous power-up are loaded.
    Enabling and freezing offset calibration after power-up (in field) gives better performance. Note that this procedure can be done without input disconnected if input doesn't have power at multiples of Fs/8.

    Regards,
    Vijay

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