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TLV1548-Q1: SPI I/O CLK activity during sample conversion

Prodigy 685 points

Replies: 2

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Part Number: TLV1548-Q1

Hello, I have a question regarding the SPI I/O CLK during the conversion step. Is it required that the CLK be active? The timing diagrams in the DS (for example Figure 16) suggest this is the case, as compared to the CS line. Is it allowable for the CLK to be off such as in the case where the SPI transfer width is only 10-bits?

Thanks

Bill

  • Hi William,

    You only need the 10 I/O clocks to get the data out of the TLV1548-Q1, you don't need clocks under /CS high.

     

    Regards,

    Tom

  • In reply to Tom Hendrick:

    Tom, thanks for the confirmation!