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I have a question about the ADS5263 differential Input Voltage and its relationship with the input frequency. On the datasheet (page 46) I see the graph that describes it and my question is: the input frequency that it´s represented is referred to the signal on the analog inputs of the ADC or to the input Sampling Clock?
Mixed Signal Applications
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Thanks for using our ADS5263EVM.
On the datasheet the graph you said, it could be the following graph:
(is it correct)?
The ADC output signal may also include spur. So this graph shows SFDR (spurious-free dynamic range)
which is covering this range from ADC signal itself down to the spur signal.
However this SFDR can vary either Input Frequency range (3MHz ~ 75MHz) or the Sampling Clock Frequency (
In reply to Chen Kung:
Thanks for the quick reply,
howerver I wrote the false page number, I meant the graph at page 64 on the ADS5263 Datasheet, figure 93, Full Scale Input Amplitude Across Frequency. Sorry about the inconvenience.
I´m testing a prototype board with the ADS5263 and from my measurements I don´t get the full 4 Vpp Input Span, but something around 3.7-3.8V.
I´m using a 80 Mhz single-ended sampling clock. Could this graph be referring to the Sampling Frequency as Input Frequency? That would explain my problem.
Thanks in advance
In reply to Giulio Boniello:
Thanks for the graph.
This shows when the analog input signal is entered
with 4Vpp (maximum range) to between INxP and INxM input pins of ADS5263:
if the analog input signal frequency is from about 0Hz to 70MHz,
the input signal will be kept the same amplitude.
But if the analog input signal frequency is above 70MHz, for example around 140MHz,
the input signal will be reduced down to the half amplitude (about 2Vpp) when input signal is about 140MHz.
This is due to the internal RCR filter across these two input pins (INxP and INxM pins).
Please look at the following graph:
This analog input signal amplitude vs input signal frequency is not related to the
Sampling Clock frequency at all.
So if we run the analog input signal less than about 70MHz, then we don't have to check
the amplitude when the frequency is changed.
Thanks and best regards,
thanks for the quick answer.
I solved the problem: I´m using the THS4131 to drive the input of the Op Amp, but I wasn´t using any RC filter on the outputs to the ADC. If I use a differential RC filter (100 Ohm - 220pF) then the ADC range is as I expected, from -2.02V to +2.04V. Any idea why?
I have anyway another question: I set the gain of the THS4131 to 1 (Rf=Rg=390 Ohm) and if I don´t have any resistor in series on the outputs the op amp outputs the correct voltages. When I put the RC filter (100 Ohm in series on both output pins) it behaves like the gain is 0.8. I solved the issue by changing the 2 Rf to 470, but this seems strange to me. Could this be related to the ADC input Circuit?
For your concern about the ADS5263 input signal amplitude,
please look at the following graph:
Adding a RC filter at the ADS5263 input pins (similar to the R-C-R filter shown on the data sheet as below)
also can help reduce the glitches which may affect the ADC range:
Also from the data sheet, it suggests using 5ohm to 15 ohm resistor in series for each input pin.
As you can see the following graph.
On our ADS5263 EVM, we use 15 ohm resistor in-series to reduce the ringing.
So it is recommended.
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