ADC12DJ3200: Output data format

Hi Paul

After looking at the ADC12DJ3200EVM and High Speed Data Converter Pro data in detail I see why the JMODE9 output format has been a little confusing to understand.

As discussed earlier, in JMODE9 the output data is a total of 16 bits, with the upper 15 bits being the waveform data, and the lsb having Over-range information. As seen from the format definition table EVEN and ODD samples have the Overrange bit set according to either the OVR_T0 and OVR_T1 thresholds.

The key piece that was not communicated earlier is that the upper 15 bits can be sent as either Offset Binary, or Signed 2's Complement. This setting is controlled by Register 0x204h, Bit 1 (SFORMAT).

The EVM is configured to use the Offset Binary setting for SFORMAT. So the MSbit is not a sign bit in the data you have been looking at. If SFORMAT is changed to 1, the output data will change to Signed 2's Complement and then the MSbit is the sign bit.

I gathered some data using the ADC12DJ3200EVM Rev A with the TSW14J57EVM. The data processing for that combination uses all 16 bits so we can see the upper 15 bits of data and the over-range bits.

Here is a 20 MHz (unfiltered) sinewave sampled at 3200 MSPS with JMODE9. Since this mode decimates by 2 the effective output sample rate of the DDC block is 1600MSPS and the Nyquist zone is therefore DC to 800 MHz (Output Sample Rate/2). The large harmonics seen are typical for a signal generator output that has not been filtered. This is why we normally recommend bandpass or lowpass filters be applied to the input signal for any performance testing.

Here is the FFT Plot for this setup:

Here is the Time Domain Codes view for the first 100 samples:

Here is the corresponding Time Domain Bits view for the first 100 samples:

In the plot above we can see the bit values go to nearly all 0s for minimim swing and nearly all 1s for maximum swing. The Over-range bits on the lsb are toggling high/low at the peaks because I have OVR_TO threshold set to -0.818dBFS and OVR_T1 threshold set to -0.034dBFS and the input level is at -0.509dBFS. So the peaks are higher than the T0 threshold, but lower than the T1 threshold.

SFORMAT can be changed from 0 to 1 from the ADC EVM GUI by the following:

1. Click JESD Block Enable to first disable the JESD204B output block
2. Click SFORMAT to change this from 0 to 1 (changes to green)
3. Click JESD Block Enable to re-enable the JESD204B output block

This is the Codes view with SFORMAT = 1. Since HSDC Pro is expecting offset binary data the result looks odd.

This is the Bits view with SFORMAT = 1. Now we can see that when bits 14:1 are nearly all 1s the MSbit is 0 since these are the positive values.

And when bits 14:1 are nearly all 0s the sign bit is 1 for the negative portion of the waveform.

If you want to look at the data using 16 bit processing you can do so by editing the JMODE9 .ini file. The file you need to edit should be in the following folder location on your PC which uses an earlier pre-production version of the ADC12DJ3200EVM and TSW14J57EVM. 

C:\Program Files (x86)\Texas Instruments\High Speed Data Converter Pro\14J57 Details\ADC files

The file is named "ADC12DJxx00E2_JMODE9.ini"

The key section to edit is shown here:

Data Postprocessing=0:1
\\operation:operand
\\operaion
\\0=bit shift
\\1=xor
\\2=and
\\3=or
\\4=not
\\operand
\\value(+ve if bitshift by right and -ve if bitshift by left)
\\E.g 0:-2,1:1024
\\bitshift by left 2 times and then xor by 1024
Number of Bits=15

The updated version should look like this:

\\Data Postprocessing=0:1 - Comment this out to remove the 1 bit shift to the right
\\operation:operand
\\operaion
\\0=bit shift
\\1=xor
\\2=and
\\3=or
\\4=not
\\operand
\\value(+ve if bitshift by right and -ve if bitshift by left)
\\E.g 0:-2,1:1024
\\bitshift by left 2 times and then xor by 1024
Number of Bits=16   \\ Change this to 16 bits

You had also asked about how we get more bits of resolution starting from the 12 bit data from the ADC. In general over-sampling and then using decimation filtering can provide effectively higher SNR and resolution.  Decimating by only a factor of 2 does not provide much increase in SNR, and wouldn't necessitate 15 bits of resolution, however since we already have filters and output formats with this data width to support the higher decimation factors available in the ADC12DJ3200 we used the same resolution for JMODE9.

Here is a link to one discussion on this topic:

https://e2e.ti.com/blogs_/b/analogwire/archive/2015/08/21/rf-sampling-how-over-sampling-is-cheating-physics

I hope this helps.

Best regards,

Jim B