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ADC32RF42: poor harmonic performance and questions on correct configuration

Part Number: ADC32RF42

Hi guys, 

My customer is asking about the ADC32RF42 that they have on a proto board. They are claiming that the harmonic performance is poor, and are asking for some help making sure they have things configured and calibrated correctly. 

They are also concerned with issues about freezing the offset corrector block. 

Is there like a config file or something in the GUI they can export for you guys to look to see how they have things configured? 

Thanks,

Brian 

  • Hey Brian,

    I forwarded your question to a device owner. He will get back with you shortly.

    Thanks.

    Yusuf
  • In reply to Yusuf%20Agoro:

    Thanks!

    I have significantly more details from my customer (including a config file) to share as well to help the device owner help us:

    "I recently received the register settings that our contracted board designer uses to initialize the ADC32RF42. My first concern was that the incorrect Nyquist zone was selected, and it looks like the device is configured for 1st Nyquist. I think our first step is to understand how we should initialize the ADC for use in our application.

    We are using the ADC32RF42 to sample a 1GHz (+/- 250MHZ) IF at 1333 1/3 MSPS. The JESD is set for 42810 mode, so we are getting 12-bit samples at a rate of Fs/10. I’m not sure what other information is necessary for configuration. Let me know and I’ll fill in the blanks. I’ve included the register file for reference. It would be great to get something back in the same format.

    It is my hope that the harmonic products that I observed are due to the NL_config for nyq1. I am also concerned about the offset IL spur that is at Fs/4, as that falls in line with the center frequency of my signal. For now, I am ‘freezing’ the offset corrector block."

    Here is the config file:

    IV_MWidebandHwInit.txt

    Thanks,

    Brian 

  • In reply to Brian Antheunisse:

    Brian,

    Have the customer try the configuration file I have attached. This was used to capture data per the customers settings. There are a few settings added from the design team. Attached is the data captured as well.

    Regards,

    Jim

    ADC32RF45_LMFS_42810_cust.cfgFs=1.33G_42810.pptx

  • In reply to jim s:

    Jim,

    Customer finally got the chance to try your configuration, here was their response:

    I tried to configuration file that you provided. I’ve inserted my data into the PowerPoint that you sent.

    I was unable to match your results at 1000M. I think the Offset Corrector Block is enabled in the configuration.

    The harmonic levels were equivalent on my hardware. I did notice that some other spurs, especially at 1100MHz, are higher. I’m not sure if these are interleaving spurs, but they show up at 300MHz and 566.666MHz.

    Fs1.33G_42810.pptx

    Regards,

    Brian 

  • In reply to Brian Antheunisse:

    Brian,

    It appears the customer may have been using 4x interleaving instead of 2x per the config file I sent. This is one reason why they are seeing some of the spurs I did not. The 2x interleaving mode also disables the offset corrector block by default. This may be why they saw the 1000MHz tone attenuate so much as this block will be enabled in 4x mode.

    Regards,

    Jim  

  • In reply to jim s:

    Jim,

    Does the ADC32RF42 even support 4x interleaving? I thought that is a feature of the ‘44 and ’45. I cannot find any reference to it in the datasheet.

    Thanks,
    Brian
  • In reply to Brian Antheunisse:

    Brian,

    You are correct. The ADC32RF42 only supports 2X interleaving.

    Regards,

    Jim

  • In reply to jim s:

    Jim,

    If this is the case, do you have any other hypotheses on why their part is behaving the way it is? Obviously the 4x interleaving setting is not the issue. 

    Thanks,

    Brian  

  • In reply to Brian Antheunisse:

    Brian,

    Is there a chance this part is a 44 or 45? Even though it is a 42, if they accidentally program a wrong register, they may get the response they are seeing. I currently do not have a 42 part so I cannot test this right now. Were these last results reported taken with the device using the latest confg file I sent? It appeared to us that the part was configured for 4x interleaving mode.

    Regards,

    Jim 

  • In reply to jim s:

    The ADC32RFxx registers that are in the configuration file that you sent is the only data written to the ADC. [The only thing that is not written are the -6.2dB TX de-emphasis settings (reg 0x0690032-35 and 0x1690032-35).]

    We are stumped.

    Thanks,
    Brian