Hello (Jim probably :),
I am facing a problem alike: http://e2e.ti.com/support/data-converters/f/73/t/598565#pi320098=2 or http://e2e.ti.com/support/data-converters/f/73/p/712929/2722985
The detail description is in the attached presentation.
General description problem 1)
One out of four interleaving cores misbehaves and its LSBs are getting stuck for periods in time. The behavior can be influenced by DC offset correction and digital gain changes, yet I did not succeed in fixing it. Freezing the IL correction seems to have no effect.
General description problem 2)
All four interleaving cores provide what seems to be 14-bit data with the 2 LSB of the 16 bit word being either random or influenced by the problem # 1. The JESD ILAS config sent by ADC reports N = 14!!! N* = 16.
Thank you for advice. This seems to be somewhat a common issue. What was the fix for the previous reports that I linked?
Sincerely
- Jiri