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ADS1261-Q1: Multiplexing several single-ended input signals

user6097033
Prodigy 30 points
Part Number: ADS1261-Q1

Hi,

I'm trying to use the ADS1261-Q1 to continuously monitor 3 signals on different input channels (Ain0, Ain1, Ain5), while keeping Vcom as the negative input to the input mux. Also trying to do this with at least 1 kSPS per channel, so I'm using 4800 SPS rate. Conversion start delay is configured to 0 us, with digital SINC1 filter.

I'm using continuous conversion, and when /DRDY goes low, read the data and switch the mux. Switching the mux should restart the conversion in progress and the new conversion should ideally reflect the new input value, is this correct?

Is there any information available on measurement delays introduced by switching the input mux? By monitoring the /DRDY pin with a scope, I've found that the /DRDY first goes back to low after switching the mux after some 600 us. This would be in line with the table on page 36 of the datasheet, but I'm also not reading correct values for nearly ~200 samples (~40 ms at 4800 SPS) after that. I have not found the explanation for this yet. For instance, with 1.5 V applied to channel 1, after switching the mux to it and reading the values (after /DRDY goes low for the first time), first value gives -0.2 V, which slowly climbs to (over ~200 samples), and settles, on 1.5 V. Am I doing something wrong?

I've tested different filter options, sampling rates and conversion delays with not much success.

One thing I've noticed is that, if I enable and monitor the STATUS byte in the RDATA operation, PGA_LOW alarm goes up and stays up some ~20 samples before a settled value is read. The PGA_LOW alarm then resets after the mux switches. Any information on this signal and how to fix it is welcome, since I haven't found much about it in the datasheet, and it's possibly the culprit behind this.

Without switching the input mux, the measurements on a single channel are fine.

Thanks

EDIT: (there was some wrong info in the original post regarding the filter and timing)

  • 0
    Prodigy 30 points

    Nevermind - it would seem that I'm retarded.

    I misunderstood what Vcom does - disconnects all other mux inputs. Using AinCom now, it's fine.

    The only thing that still bugs me is how come the values settled on 1.5 if Vcom is selected for inpmux negative.

    Best regards

  • 0
    TI__Mastermind 44550 points

    Hi,

    I'm sorry for the delayed response. I can help answer your remaining questions...

    user6097033 said:
    One thing I've noticed is that, if I enable and monitor the STATUS byte in the RDATA operation, PGA_LOW alarm goes up and stays up some ~20 samples before a settled value is read. The PGA_LOW alarm then resets after the mux switches. Any information on this signal and how to fix it is welcome, since I haven't found much about it in the datasheet, and it's possibly the culprit behind this

    The PGAL_ALM indicates that the PGA output is driving very close to AVSS (saturating) and therefore the conversion result may be a non-linear representation of the input signal.

    This is often happens if AVSS = 0V, and one of the input signals you are trying to measure is also 0V (for example, when measuring a single-ended input signal with respect to ground. One easy way to resolve this is to enable the VBIAS level-shifter and measure with respect to the VBIAS voltage on AINCOM.

    You can also check your input and PGA conditions with this Excel Calculator to determine if they are within the PGA's input common-mode range: ADS1261 Design Calculator (Rev. A).

    user6097033 said:
    he only thing that still bugs me is how come the values settled on 1.5 if Vcom is selected for inpmux negative.

    Is AINCOM connected to ground? Hopefully it is not and you can enable the VIAS level-shifter on AINCOM.

    Let me know if you have any additional questions I can assist with.

  • 0 in reply to Christopher Hall
    Prodigy 30 points

    Hey, thanks for the reply.

    >One easy way to resolve this is to enable the VBIAS level-shifter and measure with respect to the VBIAS voltage on AINCOM.

    Are there any downsides to bypassing the PGA instead and using a channel connected to AVSS for the negative input? If the gain is 1, of course

    >Is AINCOM connected to ground? Hopefully it is not and you can enable the VIAS level-shifter on AINCOM.

    It's floating, so that works too

  • 0 in reply to user6097033
    TI__Mastermind 44550 points

    Hi,

    Bypassing the PGA would allow you to connect and measure a 0V input signal. However, when you bypass the PGA you no longer are connecting your input signal into a high-impedance PGA input, but rather directly into the switched-capacitor input of the delta-sigma modulator.

    If your input signal is externally buffered (i.e. that is it have a low-output impedance), you can bypass the PGA without any issues, but if your signal is coming from a high-output impedance source, then there will be an error that occurs due to the voltage droop when a low-impedance load is connected to a high output impedance source.