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DAC38RF82: DAC38RF82EVM + TSW14J56 bundle to generate sub-nanosecond pulses.

Part Number: DAC38RF82

Greetings,

We are interested in purchasing the DAC38RF82EVM + TSW14J56 bundle to generate pulses for amplitude modulation of optical pulses (driving an EOM) for a quantum optics experiment. We would like to know whether this bundle is able to generate sub-nanosecond (~100 ps) pulses. Further, we are interested in the bundle's ability in modifying the pulse shape it is able to generate, e.g. Gaussian, arbitrary, and whether the pulse generation can be on a trigger.

Thank you very much!

  • Hi Jaiwei,

    We are looking into your question, and will be back with you soon.

    Best Regards,

    Dan

  • Jiawei,

    The narrowest pulse this setup can generate is ~111ps. The max data rate from the TSW14J56EVM would be 9GHz when using the DAC in single DAC mode, with the LMF = 811, with real data and no interpolation. The TSW14J56EVM uses a .csv format for the test data. In regards to your question about modifying the pulse, this is something you would have to create and load into the TSW14J56 as an external test pattern. This .csv file is a signed integer file, single column format. An example of a 111ps pulse file is attached.

    Regards,

    Jim

    111ps_pulse.csv

  • Hello Jim,

    Thanks for the detailed explanation.

    But I am still unsure how the external trigger can be set up.

    Jackson

  • 3005.slwu087d.pdfJackson,

    This is explained in the HSDC Pro User's Guide which I have attached.

    Regards,

    Jim

  • Hello Jim,

    Apologies for the late reply. We had been waiting for both boards to arrive and have been testing them. We followed the "Quick Start" section in the manual to set up both boards and were able to observe the NCO frequencies (2140 MHz) with DAC board in on-chip PLL mode.

    Now, we would like to have the boards generate a short pulse. Thus I put together another waveform .csv file that contains a single Gaussian wave (see attached + screencap) and uploaded it to HSDC Pro. Since our oscilloscope could only see up to 25 MHz, we set the NCO frequency to somewhere less than 25 MHz. Nevertheless, we are not able to observe the Gaussian pulse from our oscilloscope, but some sort of wavepackets (see image). The number of peaks within the wavepacket positively correlates with the NCO frequency. This is undesired as we were hoping to see the waveform in .csv file appear in our oscilloscope. Pardon my ignorance, but the more knowledgeable members in our group suggested that it's the .csv waveform mixing with the NCO? I am not sure how to proceed. Please advise or request additional information. Most settings should be the same listed in the "Quick Start" section in the manual (except NCO frequency and the wave pattern generation).

     single_pulse.csv

  • And here is the screencap that did not appear in the previous reply.

    Thanks a bunch!

    Jiawei

  • Jiawei,

    Please understand that our bandwidth is limited and we have very large customers to support. To give this priority, we would need to see what type of revenue this could be for TI. What is the end application? How many units would be purchased per year for this application? What company is this for?

    Regards,

    Jim

  • Hi Jim,

    I think we managed to get the patterns we want. We modified the .csv files that you've supplied by changing the peak value from 32768 to 32767, and we observed something that resembled what we fed in (as opposed to the inverse of it).

    But we are not sure how to shorten the peak width, as the current one is around 4 ns. How are we able to achieve sub-nanosecond peaks from this point on?

    Thanks a bunch!

  • Jiawei,

    This pulse width is based on the data rate used by the TSW14J56EVM. You would need to increase the data rate to shorten the pulse width. This will require increasing the DAC sample rate or reducing the interpolation factor if possible.

    Regards,

    Jim

  • Hi Jim,

    Thanks for your reply! We have been using the x16 interpolation. By changing it to x8 as you recommended, we do see that the output "shrunk" by a factor of two in the time domain. But I don't think I am able to get x4 or x2 from the Quick Start tab in the DAC software.

    So I am trying to explore the DAC sample rate option. Does that mean that I need to try to increase the "DAC Clock Frequency"? Since we don't have any GHz oscillators, we will have to use the on-chip PLL with our MHz oscillators. I've discovered that there are several discrete valid PLL frequencies with wild guesses of the numbers. So my question now is: how are the valid PLL frequencies determined? Is there an exhaustive list of it? I couldn't find it on the DAC38RF82 datasheet.

    Thanks again! Your helps had gotten us closer to the goal.

    Jiawei

  • Hello Jim,

    So I assumed that the DAC sample rate = DAC Clock Frequency and guessed my way to another valid PLL frequency.

    And I managed to observe a narrower pulse. (the white R1 profile is produced with DAC Clock Freq = 6144 MHz with everything else being the same)

    This seems very promising! But is there a list of valid PLL frequency somewhere? It is the only missing step so far. Guessing isn't the most efficient approach.

    Jackson

  • Jackson,

    The PLL can use one of two VCO's the part has. The frequency range of these two VCO's can be found in section 7.8 of the data sheet.

    Regards,

    Jim

  • Hi Jim

    I've changed the DAC clock frequency to 9344 MHz, and that seemed like the highest value the software can accept. With the x8 interpolation, I observed the following with the 111ps_pulse.csv you've supplied much earlier.

     We see that the width is around 1 ns. But I was under the impression that I could get it down by another order of magnitude. But it seemed like everything I can do is at its limit. What else am I missing?

    Thanks a bunch!

  • 3276.PLL setup example.pdfJiawei,

    See if the attached document helps with this.

    Regards,

    Jim

  • 5722.DAC38J84 Clock, PLL and SERDES Configuration.docxJiawei,

    The available frequencies are determined by the range of the two internal VCO's, the external reference, and the dividers used by the PLL. See the attached document for more info regarding this.

    Regards,

    Jim

     

  • 4035.DAC38J84 Clock, PLL and SERDES Configuration.docxJiawei,

    The attached document should help with your PLL frequency questions.

    Regards,

    Jim