Hi,
I am facing a similar issue with the CCD signal processor device in bench setup.
I find the data output to have random dips to 0V as shown below.
The above plot shows the output voltage(calculated from code) vs number of samples captured.
Nearly 900 samples are at 0V out of 6000 samples captured. The rest of the samples are at the expected voltage.
Increasing the number of samples also didn't help.
The timing for the CLAMP and SAMPLE clocks are verified with the input signal.
Can you please help me this issue.
Thanks
Pavithra Joshi