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DAC8814EVM: DAC8814EVM

Thomas Suter
Prodigy 30 points
Part Number: DAC8814EVM
Other Parts Discussed in Thread: REF102, DAC8814, OPA277, OPA4277

Hi

It seems like Vss on U5 pin 4 is not connected on the layout. I patched this one, but I still have problems when writing the channels. Sometimes if I change one channel another one is changing as well. I have a pull-down on LDR#. It seems like a GND problem? I toggle the SPI very slowly (as slow as 100 bit/s). The CS# is released very late after the last SPI Clk.

Has somebody else experienced similar problems?  

  • 0
    TI__Mastermind 46290 points

    Thomas,

    From a SCH viewpoint the VSS net is certainly connected to U5 pin 4. Of course it is possible that there was some manufacturing issue with the board that left it unconnected, but the final test procedure for the EVM should have caught that so I'm not sure exactly what could have happened.

    As a first step I would suggest double-checking the clock phase and polarity settings on the physical SPI bus with an oscilloscope to ensure that you are meeting. Per the timing diagram data is latched on the rising edge. Similar mechanisms are described on page 18 of the datasheet.

  • 0 in reply to Kevin Duke
    Prodigy 30 points

    Dear Duke

    I also check der Gerber Data available of the board. As far as I can see the VSS connection of U5 Pin4 is missing there as well!? 

  • 0 in reply to Kevin Duke
    Prodigy 30 points

    The second problem regarding the cross change of DAC values.
    If I assert (low active) the RS# Pin after power up the problem seems to be gone. Maybe my power supply does not ramp up properly.

    On the other hand the quiescent power consumption of the board seems quite high. My estimations (I generate the Vcc/Vss from the 5V):

    VCC(+15V): OPA4277UA/OPA277 : 9x0.9mA=8.1mA + REF102 :1.4mA + IN105:2mA + OTHERS(DAC8814,...):2mA=> Total: 13.5mA
    VSS(-15V): OPA4277/OPA277 : 9x0.9mA=8.1mA + IN105:2mA + OTHERS(DAC8814,...):2mA=> Total: 12.1mA
    P(Vcc,Vxx): 30V*14mA=420mW

    VDD/VDAC(+5V): DAC8814:5uA + P(Vcc,Vxx):84mA/75%(Efficiency)=112mA => Total: 112mA

    But I measure a current over 200mA!

  • 0 in reply to Thomas Suter
    TI__Mastermind 46290 points

    Thomas,

    I do not feel like this device should have any stringent power-up sequence requirements and I do not have any record of such issues coming up in the past, but if you would like to share some captures of the supply pin and whatever may be happening on the digital pins we could give it a look. Though I don't have any record of such things, that does not mean it doesn't exist. Page 19 of the datasheet indicates some sensitivities around 1.5-2.3V so perhaps there is something worth digging into.

    Typically the concern at power up is related to POR / OTP issues and, at least with these older devices, most of the time the RESET functions do not trigger a full POR / OTP load, they just return the register map to the default values and clear the input shift register.

    It could be possible that some of the mechanics of the SPI are latching some "accidental bits" during power-up, but based on the documentation in the datasheet the device should only latch the last 18-bits seen on SDI after a CS rising edge should be latched, so this seems unlikely as well.