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DDC232: Input ESD protection specifications

Prodigy 60 points

Replies: 5

Views: 38

Part Number: DDC232

Hello,

I've looked into the datasheet of DDC232 and on the forum but I don't find the answer to my problem.

Similar to other posts, in our application we have to protect the inputs in order to avoid damage and at the same time, we would like to avoid leakage by adding external ESD protection (we have to measure pA/nA range)

My question:

Which are the specifications of the clamp diodes (ESD protection) already integrated at ADC inputs (the protections indicated on the Datasheet at Figure 3 and Page 8)?

What is the maximum current applicable? 

Thanks!

5 Replies

  • Hi Stefano,

    The DDC232 ESDs are rated as:

    HBM pass up to 4000V.
    CDM pass up to 1000V. 

    If you are talking more about some kind of signal overload (current or voltage), I think the answer is more complex than that and one has to look also into time vs intensity of the overload. Can you describe what do you want to protect DDC232 against?

    Regards,
    Edu

  • In reply to Eduardo Bartolome:

    Thanks for the answer.

    On my application it could be happens that one of the photodiode we are measuring is (or it goes) to short circuit. In this case it may be possible to have up to 30V (during polarization < 20ms) directly at the input of the DDC232.

    Honestly I am not able to find any protection with very low leakage (< 10pA)

    What is your raccomandation to protect the input?

    Thanks

  • In reply to Stefano Dalpez:

    Hi Stefano,

    Yeah... it is a tough question. I asked around and we do not have data on that... Still checking trying to find some guideline...

    I got an extra question, though... Why is only 20ms? I mean, your source then cuts off the supply voltage and 20ms is the reaction time of your source clamp?

    Can it happen more than once on the same channel? 

    And if the DDC channel breaks but the other channels still work, is that ok?

    Not sure I need all these answers but in case they come up during our internal discussion...

    Regards,

    Edu 

  • In reply to Eduardo Bartolome:

    Hello,

    thanks for the answer.

    20ms is the "integration time" for each channel (one by one) in our application and it is also the worse period of application of the voltage to the input of the DDC.

    This situation may happens up to one time per second, then the system should be able to detect the situation and avoid to polarize the same input again.

    Today we are thinking to precise limit the maximum current that the polarization circuit can deliver to the diode and than to the DDC input.

    Can this be enough? Which can be the maximum current tolerable by each input?

    P.S. Single failure in an input means a failure for the complete board...

  • In reply to Stefano Dalpez:

    Hi Stefano,

    I am waiting for the reply from one of the designers but he is ooo. I'll get back as soon as I hear from him.

    I think I get your explanation. Basically the polarization voltage (let's say HV) is not DC but you actually switch it on for 20ms and then OFF, right? So, at that instant you want to measure the saturation on the DDC and feedback to the controller of the power supply to not power up anymore, right? Then you would replace the faulty PD and move on. So, one can assume that, assuming your loop can work within 1s, you will only get one of those high current levels in, right? Honestly, I think the cumulative may not make a difference. I think this fault is more like a "fuse" than an electromigration (but it's one of the things I am checking).

    And yeah, I think if we knew the current limit, you could set your source to that limit and be done. Unfortunately I don't think we do (checking). I can see three options:

    1. Go check it. In the end, this may be easier and more reassuring than any kind of calculation. I.e., take a part, apply that kind of pulse to every channel (there may be differences on trace routing inside the IC from channel to channel) and see where it fries, then add margin... I am checking if this is good enough to extrapolate to all parts.
    2. Another idea is:
      1. to raise HV only to a certain safe level but where you can do a measurement with the DDC and realize if there is a short or not. 
      2. Or a variation is if the source can report the consumed current back (assuming that loop is faster than the DDC loop). I guess the issue is that if the PD blows with the full HV, then nothing would save you.

    3. The final, dumbest one, is why can't you replace the DDC when you replace the PD? Is it "just" a cost issue? I guess that if this happens often, it is an issue :)

    I know this is not helping much. FYI, before the designer left, he explained that ESDs are pretty robust and that is actually the trace connecting that input to the ESD that would blow. He didn't have any numbers, thought. The trace resistance is very small, so, if you apply 30V, basically you get the full voltage drop (30V-0.4V) across that trace which can be huge current. So, unless that source limit is instant, we both thought that the solution may require a series resistor with the input. The larger that resistor, the more noise you add, but it may be a price you can pay...

    Does any of this make sense?

    Regards,
    Edu

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