Hi team,
My customer is testing our ADC08D500 in a DSO project. And we met below issue:
1. When set the device to normal dual channel mode, the device works well and the DCLK pin output clk signal is present. The register configuration is as below:
write 0x7fff to REG 0xd
write 0x07ff to REG 0xe
2. When set the device to DES mode, the issue is that the DCLK pin output clk signal is gone after configuration. The register configuration is as below:
when select CH1 as input: write 0xffff to REG 0xd; write 0x07ff to REG 0xe
when select CH2 as input: write 0xffff to REG 0xd; write 0x87ff to REG 0xe
I have checked the schematic, the key pins connection are:
DCLK_RST: to GND,
PD: to GND
PDQ: to GND
FSR/ECE: floating
The schematic seems OK. So can you help advice why the device is abnormal in DES mode? Is there any other register needs to be configured or any other step needs to be done before enabling DES mode? Thanks.
Best regards,
Wayne