AFE5851: Cannot set FINE_GAIN in Static PGA mode

Hi,

Thanks for using AFE5851.

we will reply your question very soon.

Thank you!

Best regards,

Chen

Hi,

Thanks for using AFE5851 device.

Please try and make sure the following settings:

1) make sure only use and set => "LSB First"

2) set address=0x99 data=0x8

3) set address=0x9A data=0x5 (assume coarse gain=0dB)

4) then you can set as you want address=0x99 data=(from 0x8 to 0xF)

then you can see the Gain changed similar to Figure 3 on Datasheet Page 9.

(note: very tiny change when using FINE_GAIN).

Please try it.

Thank you!

Best regrds,

Chen

Hi Chen,

Thank you for the prompt answer.
1) LSB first
I guess it is supposed to be applied to data decoding. Yes, we use LSB first mode. The data makes sense, so this is not a problem.

I am sure it was successful to set the registers at 0x99 and 0x9a in the correct order. Let me show some curves of the envelope of our signal with different gain settings.
1) REG[0x9a]=0x1a, REG[0x99] =0x08, total 21 dB

2) REG[0x9a]=0x1a, REG[0x99] =0x0F, total 21.875 dB

3) REG[0x9a]=0x1b, REG[0x99] =0x08, total 22 dB

I know the setting FINE gain should not impact the data much, but the data with 21.875 dB applied gain should be closer to the one with 22 dB, but it actually looks more like the one with 21 dB. This is why I believe, FINE gain setting does not go through.
Since FINE gain shares register with static PGA mode bit, I believe I set the registers correctly. It was also confirmed by register readback.
What else may we miss to set here?
Thank you.
Best regards,
Peter

Hi Chen, 

May I ask if you have any update? Thank you. 

Best regards, 
Peter

Hi Chen, 

Seems like register at 0x97 comes up with 0x8c after power up, so interpolation bit is enabled. I have also tested it with writing 0x80, still getting the same results.

Have you tried to reproduce my problem on hardware?

Thank you, 

Peter

Hi Chen, 

Thank you for the reply. 

No, I do not have AFE5851EVM, I conduct tests on our prototypes. 

Regarding to register at 0x97... All the 16 ADC on our board came up with default value of 0x8c without any exception.

I experienced a couple of strange issue with that register though:
1) Whatever I write into that register, bit 7 will be negated. The rest of the bits are okay.
So writing 0x80 and reading back 0x00. Writing 0x05, reading back 0x85.

2) After writing that register, I am not able to disable static gain mode by resetting bit 3 of 0x99. Only issuing software reset (REG[0] <= 1) made static gain enable/disable working. Adjusting COARSE_GAIN still had impact on the data.

3) Then I managed to make FINE_GAIN working to some extent. I made sure that register at 0x97 has value of 0 (writing 0x80, explained above). I have captured some data (envelope of a test signal).

COARSE_GAIN=0x14, FINE_GAIN=0x0

COARSE_GAIN=0x14, FINE_GAIN=0x7

COARSE_GAIN=0x15, FINE_GAIN=0x0

It is clearly visible, that FINE_GAIN started to work, but seems like it adds less gain then 0.125 dB/LSB. The signal on the second picture (15.875 dB) is way lower than on the third one (16 dB), however the applied gain is almost identical.

In order to emphasize this issue, I made my FPGA increment COARSE_GAIN and FINE_GAIN register periodically.

Coarse gain increments at sample 120 and 480, while between those only FINE_GAIN increments from 0 to 7. 

On the picture above the effect of FINE_GAIN is clear, but that instant jumps in the signal suggest, the slope of FINE_GAIN is not 0.125 dB.

For reference I attach the same data acquisition without any FINE_GAIN adjustment:

Would you please help me understand the symptoms I described above?

Thank you. 

Best regards, 

Peter

Hi Chen, 

I am sorry, but not sure if I understood what exactly I should test. Your suggested steps were the ones I reported in my last post. 

Best regards, 

Peter

Hi Chen, 

Thank you. 
We are using AC-coupling.

While I am trying to reproduce the same here again, may I ask what the value of register 0x97 was during your tests?
Do you have any explanation on the misbehavior of 0x97 register I described above?

Peter

Hi Chen,

Thank you. 

I would like to ask again, what the register value of 0x97 was during your tests? Do you have any explanation on the misbehavior of that register I described above?

Best regards, 
Peter

Hi Peter,

How are you?

Yes, when you select register 0x97 for Fine Gain (for fixed gain mode)

then please use the register 0x97 0x86

This should work for you.

Since this device has been released long time ago, this had been working this way,

I really don't know why need to include

0x97 register for setting Fine Gain at fixed gain mode.

Very sorry about that.

Also when you are setting Gain,

please must set TGC_Reg_EN=ON

Thank you!

Best regards,

Chen

Hi Chen, 

I have managed to set up that register (0x97) the way you described, but does not have any impact on the gain.
Found, that when I set bit 7 of 0x97 FINE_GAIN starts to be visible on the data, but it does not seem to 
have the range of 0 - 0.875 dB.

Orange curve shows a channel without using incrementing FINE_GAIN, while blue is with FINE_GAIN applied. If FINE_GAIN had the full range, blue curve 
would not be this staircase like.
Meanwhile my colleague is trying to reproduce what you saw on EVM, but he is struggling to set the kit up.

Best regards, 

Peter

Hi Chen, 

I am afraid, this did not help.

Blue is with 0x00 in register 0x15 and 0x21, while in case of orange curve I have set those registers to 0x5. Please note, that ADCs use different starting coarse gain to be able separating them visually.

Best regards, 

Peter

Hi Chen, 

I am reading/writing with otherwise proven methods, that ensures the correct setting of REG[0] to access both general register table and TGC registers.

Best regards, 

Peter

Hi Chen, 

we used 500 kHz sine.

Best regards, 

Peter

Hi Chen,

unfortunately we cannot find the answer to our question, so we repeat it.
1) Why is the gain halved when we go from DC-coupled mode to AC-coupled mode?
2) What is the correct mode to use when our single-ended input is AC-coupled?

Thank you, 
Peter