We are using a ADS131E08 and I am issuing an OFFSETCAL command. While it does do something, I was expecting it to 'zero out' the offset. I am not seeing that.
I believe I am following guidelines...
My config sequence is:
- Assert chip RESET - wait 20usec
- Send SDATAC
- Issue RREG addr 0 to verify chip present
- Configure registers WREG
- CONFIG1=0x96
- CONFIG2=0xE0
- CONFIG3=0x40
- CH1SET to CH8SET = 0x10
- Assert START line - wait 5ms to allow 1ksps to settle
- Issue OFFSETCAL - wait 160ms to allow to complete
- Start sending RDATA after DRDY to read samples
Prior to OFFSETCAL all 8 of my channels are negative.
After OFFSETCAL completes, I am reading the following values:
336 235 -204 798 2929 626 418 3279
Why would I even get a negative number? Why some numbers so high? Taking the channel 8 above with the value 3279 - if I monitor that channel the value varies maybe +/- 40 ADC counts - it is as if 3279 should have been chosen as the '0' offset.
And if set CH1SETtoCH8SET to 0x11 (short inputs and set mux to midsupply), I am reading values:
313 249 259 176 82 378 288 325
I am confused if the OFFSETCAL is even working properly.