Several months ago, I posited the question, "ADC128S102: something strange -- Dout are clocked out on the rising edges of the SCLK"
We were using ADC128S102(CIMT) that time, and now we using ADC128S102QML-SP.
-- Frequencies for SCLK input is 8MHz~16MHz write in datasheet of ADC128S102,
-- Frequencies for SCLK input is 0.8MHz~16MHz write in datasheet of ADC128S102QML-SP.
We don't think this chip exists the frequency problem of ADC128S102, So we still use 1.5625MHz for ADC128S102QML-SP, but now the same problem has arisen, and the phenomenon is exactly the same, so I don't need to repeat it.
I want to confirm whether the two chips have same structure, and we can only use 8MHz~16MHz for it?
Thanks,
Luddy