I'm using this part in a design and trying to read data from it. I'm using it in 16 clock frames and the SDO line is high for the first 14 bits of the 16 clock conversion frame and then low for the last 2 clocks, which yields a maximum ADC value. However, the input signal is roughly mid-scale so we should be seeing something other than the max value. My clock is only 12.5MHz (I see a note that the part prefers 40MHz) but that's not an option in this application. Could that really be the issue? I attached some waveforms showing what i'm seeing on the scope. Also, the period between samples is variable from back-to-back (meeting tacq of course) to as low as once a second (though each sample should have the same timing profile). I have to decide reasonably quickly whether I can make this part work or I have to find a replacement. We're looking at volumes in the 100K+ for this design with a reasonably short horizon. Any help you can provide is appreciated.Waveforms.pdf0456.Schematic.pdf