ADS1292R: Cannot start conversion

Hello Jacob,

Thank you for your post and welcome to our forum!

Can you tell us the status of the START pin? If the START pin is pulled low to ground, you must send the START SPI command to begin ADC conversions. That might explain why you do not see the /DRDY pin pulsing at the configured data rate.

Make sure that you can read the register values back to verify they are written correctly. We have some other initialization debug tips on our ADS129x E2E FAQ page that might be helpful.

Best regards,

Hi Ryan,

Thank you for your time.

I've tried both setting the start pin high (with and without start command) and setting start pin low with start command.

When writing in a register, I can read back the written value without problems.

Here's my setup code, by the time this code runs, the device has been powered up, the spi communication established and clksel pin has been set high.

The SPIComTransfer function is used in Ads1292ReadID and has been proven to work.

nrf_gpio_pin_set(SPI_PWDN_PIN);                                                    /*Reset pin high*/
nrf_delay_ms(1000);                                                                            /*Wait 1 second*/
nrf_gpio_pin_clear(SPI_PWDN_PIN);                                                 /*Reset pin low*/
nrf_delay_ms(100);                                                                              /*Wait 0.1 second*/
nrf_gpio_pin_set(SPI_PWDN_PIN);                                                    /*Reset pin high*/
nrf_delay_ms(1000);                                                                            /*Wait 1 second*/

Ads1292_Sdatac(&m_ads);                                                                 /*Stop contiuous mode*/
nrf_delay_ms(10);                                                                                /*Wait 0.01 second*/
Ads1292_WriteRegister(ADS1292_REG_CONFIG2, 0xA0);              /*Enable reference buffer 2.42V*/
nrf_delay_ms(1000);                                                                            /*Wait 1 second*/
Ads1292_WriteRegister(ADS1292_REG_CONFIG1, 0x02);               /*Set oversampling at 500 SPS*/
nrf_delay_ms(10);                                                                                /*Wait 0.01 second*/
Ads1292_WriteRegister(ADS1292_REG_CH1SET, 0x01);                 /*Set channel input to shorted*/
nrf_delay_ms(10);                                                                                /*Wait 0.01 second*/
Ads1292_WriteRegister(ADS1292_REG_CH2SET, 0x01);                 /*Set channel input to shorted*/
nrf_delay_ms(10);                                                                                /*Wait 0.01 second*/
Ads1292ReadID(&m_ads);                                                                  /*Read device ID*/
nrf_delay_ms(10);                                                                                /*Wait 0.01 second*/
nrf_gpio_pin_set(SPI_ADC_CONV_PIN);                                           /*Start pin high*/
nrf_delay_ms(10);                                                                                /*Wait 0.01 second*/
Ads1292_Rdatac(&m_ads);                                                                 /*Start continuous mode*/
nrf_delay_ms(100);                                                                              /*Wait 0.1 second*/

SPIComTransfer(NULL, 0, &rx_buffer[0], sizeof(rx_buffer));               /*Read 9 bytes*/

Once again, thank you for your time!

Jacob.

Hi Jacob,

Forgetting the register read/write commands for a moment, I'm surprised that the /DRDY pin is not toggling after power-up when the START and CLKSEL pins are pulled high. Since you are using the internal oscillator, there is nothing else you need to do after power-up in order for conversions to begin.

The /RESET pulse in the beginning of your code is too long. After 2^10 clock periods (2 ms), the device will enter a power-down state. Instead, we want you to issue a /RESET pulse of 2^9 clock periods or less. The minimum /RESET pulse width is only 4 clock periods or 7.8 us. 

If you still do not see /DRDY toggling, check two things:

1. Set the CLK_EN bit to 1 in the CONFIG2 register and probe the CLK pin. You should see the internal 512-kHz square wave.
2. If possible, disconnect the /DRDY pin from anything else to ensure it's not being overloaded.

Best regards,

Hi Ryan,

As it turned out, the chip wasn't working properly. We checked our design once more and found the reason why the chip broke.

By changing the chip and using your test, we were able to make it work.

Thanks a lot!

Jacob