I am trying to get the following scheme working in TAS3204:
TAS3204 has been configured to run in slave mode. I have generated the code (attached) using PurePath Studio GDE (version 1.88 build 5) and downloaded through I2C interface. The I2C download is fine since I am able to get audio out on DACs if I use signal generator blocks of TAS to produce the signal and output it to DACs instead of taking any input. But the above input-to-output bypass mode is not producing any signal at the output. We have probed the input and output pins of TAS, signal is seen entering the chip but nothing comes out at the output pins.
Is there any I2C register which can be read to get some information about what is going on inside TAS? I have checked the firmware download status register (I2C subaddr: 0x02), which didn't report any errors. Am I missing something?
Thanks in advance.
PS: I do not have an EVM board.
< reattaching the block diagram >
One thing I need to clarify: Are you running in slave mode or you're using slave download?
Can you attach your .pfw file so I could take a look?
have you tried the I/O test configuration which is described in the datasheet? In this mode the TAS streams audio directly from its inputs to the matching outputs even without a correct program in the eeprom. Through this you could confirm that your adc and dac circuits are working correctly. Then all that would be left is a possible programming error of the TAS.
PS since your are using a non EVM Board. What measures did you take against the noise pattern on the dac output?
Thank you both for your inputs.
I am using slave download, sorry for the confusion. Also, PFA the .pjw file (I have renamed .pjw to _pjw.txt since I was getting "File Format Not Supported" error while attaching the .pjw file). Could you please let me know if I'm missing anything?
Yes, we tried the I/O test configuration mode and is not seem to be working. As I mentioned earlier, we could probe the signal at the input pins of TAS but no signal at the output pins. Also, one doubt I have is since there are 3 stereo inputs to TAS and only 2 will be selected internal to the chip, which of the 2 get selected in I/O test configuration mode? Is it ADC1->DAC1, ADC2->DAC2 or something else? Will this information be updated in I2C registers of TAS in I/O test configuration mode so that we can read these register contents?
The board was designed by taking into consideration the application notes, board schematics and other references of TAS3204 EVM board. I will check with the hardware people to see if anything we haven't taken care w.r.t. noise pattern on DAC outputs.
I am not familiar with slave download myself, have you tried master download to see whether that's working? or you don't have an EEPROM on board? Or if you could tell me how you did your slave download, then I could see whether I can reproduce on my board.
I am not able to download the .pfw file you attached, could you attach again?
Did you send the corresponding I2C commands to configure the GPIO ADC etc as in the file I attached?
if the I/O Testconfiguration isn't working you seem to have a more basic hardware problem instead of a software related error. It is correct that ADC1 streams to DAC1 and ADC2 to DAC2. ADC3 is not included in this test, since this input is only chooseable via the chip internal sw defined mux. But you should be able to see a signal on the outputs when the I/O testconfiguration is runnin from the analog inputs.
So lets see if we can get this IC running:
First of course check all six power supply voltages if they are present at the TAS
Next check the Power Down, Voltage Regulator and Reset Pins (7, 62, 49) all should have a high level signal since these inputs are low active
Then see if the voltage references are working correctly Vmid should have Vdd/2 als level. VR_ANA, VR_DIG and VR_PLL are supposed to be at 1.8 Volts. VRef should be somewhere arround 1.3 V
If you got all these voltages correct, check the current consumption of the TAS, when powered up the TAS needs arround 180mA supply current.
The next thing you should check is the external oszillator. When the TAS is powered up, you can measure the cyrstal input frequency. It should be exactly 24.576 MHz. If this signal is also present at the TAS you normaly can already see the output clocks on the pins MCLK_Out, LRCLK_Out and SCLK_Out. 12 MHz, 3 MHz and 470 KHz if I'am not mistaken.
After that I would normaly say that the TAS is working correctly hardware wise. Now you could only check if your analog audio inputs signals are in a range the TAS can handle. The audio signal must be dc decoupled at the inputs pins, so that the TAS can shift the audio signal via a dc offset of Vmid into an all positiv range. You can measure this by muting your audio signal and take a measurement of the dc voltage directly at the analog input pin of the TAS. If you measure 1.8 V apply an audio signal with 500 mV amplitude, the dc part of the signal should stay the same.
After that either you can now see an audio output signal at the dac pins with lots of noise on it or I'am currently out of ideas.
What I really appreciate would be if you could check with your hw designers, which measures they have taken against the output noise. That is one topic, that is keeping me working constantly for weeks now. After adding a post low pass filter like the one on the EVM board I got an almost noise free audio signal, still there is some noise left and some input from other developers would be really welcome regarding what kind of experiences they have made with the noise pattern so far.
Greetings from Germany,
Thanks for your valuable inputs. After verifying the voltage levels at different points as suggested, we traced down the issue to a wrongly configured resistor value. Once we replaced it with the proper one, TAS started working fine. I/O test, slave download etc. are behaving properly now.
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