• Not Answered

Tlv320AIC3104 CODEC Strereo output issue

Hi All,

We configured Tlv320AIC3104 as below.

  1. Clock Type selected - PLL
  2. Input clock - BCLK
  3. sample Rate - 20.4Khz
  4. No .of bits -24bits
  5. Selected  Input line  - Line2 L& R

we configured TlV320AIC3104 codec with reference to Application Notes which is available on web - "codec_sample_slaa403[1].pdf

Issue: After configuring codec chip for stereo out, it is still acting
as a mono .

We have checked this issue from the aspect of  I2S driver by checking
the same on evaluation board(EVM5505), which has TLV320AIC3254 CODEC

On evaluation board(EVM5505), it is working fine.

So we are suspecting the TLV320AIC3104codec configuration.

We are attaching the TLV320AIC3104 codec configuration code .

Could you review the below code and let us know is there any issue.

Thanks in advance.

/****************************************************************************************************/
/* codec configuration for Line_IN -> LINE2 */
PSP_Result  AIC3104_init()
{
 
  PSP_Result    result = PSP_SOK;

    result = AIC3104_Write(0, 0x0); /* write 0 to page register to select page 0 */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(1, 0x80); /* Reset codec */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(8, 0x00); /* config BCLK as i/p */
    if (result != PSP_SOK) {
        return (result);
    }

    result = AIC3104_Write(9, 0x20);//0x10); /* config no.of bits */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(101, 0x00); /* Select PLLDIV_OUT as a CLK_IN */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(102, 0xA0); /* Select clk source */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(8, 0x00); /* config BCLK as i/p */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(3, 0x81); /* PLL_p=1 */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(4, 0x40);//0x80); /* PLL_j=32 */16
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(5, 0x00); /* PLL_D_MSB=0 */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(6, 0x00); /* PLL_D_LSB=0 */
    if (result != PSP_SOK) {
        return (result);
    }

    result = AIC3104_Write(11, 0x01); /* PLL_R=1 */
    if (result != PSP_SOK) {
        return (result);
    }

    result = AIC3104_Write(14, 0x40);//0x0A); /* diffrential mode selected*/
    if (result != PSP_SOK) {
        return (result);
    }

    result = AIC3104_Write(17, 0x00); /* MIC2 Left ADC ctrl reg */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(18, 0x00); /* MIC2 Right ADC ctrl reg */
    if (result != PSP_SOK) {
        return (result);
    }
   
    result = AIC3104_Write(19, 0x8A); /* LADC pwr up */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(22, 0x8A); /* RADC pwr up */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(15, 0x00); /* Unmute Left PGA */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(16, 0x00); /* Unmute Right PGA  */
    if (result != PSP_SOK) {
        return (result);
    }
#if 0
    result = AIC3104_Write(12, 0xA0);//0x0A); /* filter*/
    if (result != PSP_SOK) {
        return (result);
    }
    #endif
    result = AIC3104_Write(7, 0x0c);//0x0A); /* enable left DAC & right DAC */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(37, 0xE0); /* power up DACS & config HPLCOM->HPLOUT */
    if (result != PSP_SOK) {
        return (result);
    }

    result = AIC3104_Write(43, 0x00); /* unmute LDAC volume */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(44, 0x00); /* unmute RDAC volume */
    if (result != PSP_SOK) {
        return (result);
    }

#if 0
    result = AIC3104_Write(82, 0x80); /* route left DACout->Left lineout */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(92, 0x00); /* route right DAC out->Right lineout */
    if (result != PSP_SOK) {
        return (result);
    }

    result = AIC3104_Write(86, 0x09); /* powerup left line out differnetial */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(93, 0x09); /* powerup Right line out differnetial */
    if (result != PSP_SOK) {
        return (result);
    }
#else   

    result = AIC3104_Write(47, 0x80); /* DAC_L1 HPLOUT ctrl reg */
    if (result != PSP_SOK) {
        return (result);
    }
   
    result = AIC3104_Write(54, 0x80); /* DAC_L1 HPCOM Ctrl Reg */
    if (result != PSP_SOK) {
        return (result);
    }

    result = AIC3104_Write(64, 0x80); /* DAC_R1 HPROUT Ctrl Reg */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(71, 0x80); /* DAC_R1 HPCOM Ctrl Reg */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(51, 0x09); /*  HPLOUT Level CTRL Reg */
    if (result != PSP_SOK) {
        return (result);
    }

    result = AIC3104_Write(58, 0x09); /*  HPLCOM Level CTRL Reg */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(65, 0x09); /*  HPROUT Level CTRL Reg */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(72, 0x09); /*  HPRCOM Level CTRL Reg */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(37, 0xE0); /* power up DACS & config HPLCOM->HPLOUT */
    if (result != PSP_SOK) {
        return (result);
    }
    result = AIC3104_Write(38, 0x10); /* config HPRCOM->HPROUT */
    if (result != PSP_SOK) {
        return (result);
    }
   
    #endif

}
/****************************************************************************************************/

Thanks,
Rajasekhar ch