I've tried both the PCM1802 and PCM1808 and I can get I2S data out on either chip if they're running in master mode, but the data is always low when running in Slave mode.
I2S signals are being produced from a CC2510 and I have programmed the Frequency divider to match exactly the signal frequencies of the 1808 in master mode(@512fs).
BCK = 1.625 Mhz
LRCk = 25.40 Khz
Below is a screen cap of the scope. All signals are being produced by the CC2510 except for input 3 which is the data line and as you can see its always low.
Using a PCM1808 EVM, I am able to input LRCLK = 25.4khz, BCLK = 1.625 MHz and MCLK = 13.0048MHz, and receive proper data output in slave mode. In this application, are the MD pins being changed when switching from master to slave mode? Also are the clocks from the frequency divider synchronous to the MCLK, and are they low-jitter?
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