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I2S in PCM4220 and time shift

Other Parts Discussed in Thread: PCM4220, PCM1794A

Hello!

Ive got question for TI engineers. I want to use PCM4220 and PCM1794A but question is: Are left and right channels parallel or serial? I think if this channels are clocked by WCLK (RLCLK) or if the signal is converted simultaneous and just output registers are send with LRCLK. I need this informations just if you are 100% sure.

Best regards

Marek Petrinec

  • Hi Maraek,

    With I2S, the data is sent between IC’s serially, alternating between left and right channels using the WCLK.

    Are you concerned about the analog output of the DAC not the I2S? Are looking to see if both L/R DAC outputs are latched and recalculated to a new analog output level simultaneously rather than sequentially?

    Regards,

    Matt

     

  • Hi. Yes thats correct. I need to know if outputs and inputs are sequentialy.

  • I2S is by nature sequential due to the alternating latching of left and right inputs using WCLK to define the data for each channel.

    As for the DAC analog outputs, I believe they are sequential and get calculated once the corresponding input word has been latched through the part. It does not waits for both input words, to then calculate the output. However, there are interpolation filters that will make the output waveform continuous so these discontinuities will never be visible.

    Regards,

    Matt

  • you believe? sorry but i need it certain! iam working on project where i need to know it exactly. I think it is stupid question but are you able to provide me full internal circuit of this IC-s? or just full block-circuit with time tree or interconnections.