In Figure 15. Typical Connection Diagram in PCM4204 data sheet, the SCKI, BCK and LRCK lines are connected to 100 ohm resistors.
One FPGA (or one DSP C6726B McASP interface) is the master to supply those three clock lines (SCKI, BCK and LRCK) for total six PCM4204 Analog to Digital Converters.
Can FPGA clock lines directly connect to three clock lines of PCM4204 without any resistors in between? Or should we connect the respective clock lines all
together on the 6 PCM4204 and run one 100 ohm resistor to the device generating that clock? So in essence end up with three resistors.
Or we need to have six 100 ohm resistors connected to six PCM4204 for each clock line?