Problems implementing slaa449a Application Note/Report.

Christopher Ingraham

Other Parts Discussed in Thread: MSP430F5359, TLV320AIC34

We have implemented a new hardware design where we've connected an MSP430F5359 to the TLV320AIC34 using the method described in the SLAA449A application note. This provides a means by which the SPI interface on the MSP430 can be used to drive the IIS data stream in "Left-Justified" mode.

I generated a "sine wave" data table to test the interface. The sine wave data spanned the full 16-bit range (values from 0 to 65535). When I sent this data to the codec, I observed the following wave form on the DAC Line Level output:

It looked to me like that full 16-bit data wasn't making into the codec properly, so I divided the input by 4 resulting in an input data stream that spanned a 14 bit range (0 to 16383). When I sent this data to the codec, I observed a sine wave but the "top" appeared to be clipping slightly:

So there are a couple of things here that are confusing me. First, I don't understand why I don't seem to be able to get the full 16-bit signal through the codec. Second, I don't understand why there is such a large DC offset in the signal. It seems shifted higher than it should be.

Here is a short list of how I am configuring the registers in the TLV320AIC34 to get this far:

Any help you can send my way would be greatly appreciated.

Thanks,

Chris.

over 9 years ago

0 Dominik Hartl11 over 9 years ago

TI__Guru 51466 points

You need to use 2s complement integers, not unsigned. Please check that you use the correct number format. The DAC doesn't use 0 to 65535 but -32768 to +32767.

0 Christopher Ingraham over 9 years ago in reply to Dominik Hartl11

Intellectual 1000 points

Hello, thank you for your response. I thought that may be the problem earlier and I thought I tried using signed 16-bit values as you suggested. However, when I did that, I got the following waveform (Sine wave values spanned (-32767 to +32767):

So I again took this signed 16-bit data and divided it by two and got the following:

and finally, divided by 4 resulted in my sine wave:

It still feels to me like not all the bits of my input signal are making into the codec using the SPI to IIS (Left Justified mode) conversion logic. I double checked and verified that I was configuring register 9 as a 0xC0 which should be putting the part into Left Justified mode. I don't beleive I listed that as one of the registers I was configuring in my original post.

Any other ideas?

Thanks again in advance....

0 Diego Melendez over 9 years ago in reply to Christopher Ingraham

TI__Guru 57800 points

Hello Christopher,

Have you tried modifying register 10 (0x0A) to see if adding some offset to the data stream could improve the signal, perhaps the problem is related to this.

Regarding the DC offset you mention in your original post, It is related to the output common mode voltage, selected in register 48 (0x28).

Best Regards,

-Diego Meléndez López

Audio Applications Engineer

0 Christopher Ingraham over 9 years ago in reply to Diego Melendez

Intellectual 1000 points

Hello Diego,

Gosh, I feel pretty foolish. I was measuring the signal on the wrong side of a resistor. The side I was measuring was getting some sort of feed back from the output amplifier circuit since it was being driven too hard. The input signal was a perfect sine wave with just too much amplitude for the output circuit. Once I trimmed down the signal using a -8.5db setting in register 82, things started behaving perfectly.

I think the actual answer that solved this problem was the first reply that made me start using 2's complement (32767 to -32768) values instead of my original 0 to 65535. Now, if I just remember to look at the right signal, everything will be fine! ;)

Thanks for your help. I think I have this side under control now.

Best Regards,

Chris Ingraham

Audio

Audio forum

Problems implementing slaa449a Application Note/Report.