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SRC4192 Bypass Mode

Sadanori Kato
Guru 36490 points
Other Parts Discussed in Thread: SRC4192, SRC4193, PCM5101

Hi,

Could you please tell us the behavior of the bypass mode in detail for each setting of the serial port modes as below?
We believe that SRC4192 directly passes the input port data(BCKI, LRCKI and SDIN) to the output port data(BCKO, LRCKO and SDOUT) in the bypass mode regardless the setting of the serial port modes?
Could you please give us your advice if we have any misunderstanding?

Best regards,
Kato

  • 0
    TI__Guru* 95165 points
    Hi Kato-san

    The bypass mode let the input port pass directly to the output port. This option is useful for passing through non-audio control and status data.
    No dithering is applied to the output data in bypass mode, and the digital attenuation and mute functions are also unavailable.
    Although as the user guide says "The input and output port clocks must be synchronous with one another in bypass mode."

    Best regards,
    Iván Salazar
    Texas Instruments
  • 0 in reply to Ivan Salazar
    Guru 36490 points

    Hi Ivan-san,

    Thank you for your quick response.
    Could you please give me your advice since I don't understand the behavior of the bypass mode although I read the data sheet and the user's guide ?

    Q1. Behavior of Both Input and Output Ports are Slave Mode
    Would you tell us  whether SDIN of the input port data is passed to SDOUT of the output port data only ?
    In addition, should BCKO and LRCKO be input when using SRC4192 as the slave mode ?

    Q2. Behavior of Output Port is Master Mode
    Would you tell us  whether the input port data(BCKI, LRCKI and SDIN) is passed to the output port data(BCKO, LRCKO and SDOUT) ?

    Best regards,
    Kato

  • 0 in reply to Sadanori Kato
    TI__Guru* 95165 points
    Hi Kato-san,

    Let me explain in detail.
    When both Input and Output ports are in Slave mode BCKO, LRCKO, BCKI and LRCKI are inputs. This device will take the data from the Input port and convert its sample rate to adjust it to the sample rate given in the output port from an external source. Regarding the SDIN, the device will adjust its input Data format to the output Data format and then set it to SDOUT. (SDIN is always input and SDOUT is always output)

    When Output port is in Master mode BKCI and LRCKI are inputs and BCKO and LRCKO are outputs. The device will take the data from the Input port and convert its sample rate to adjust it to the sample rate derived from the Reference clock, then this data will be set to the Output port. Regarding the SDIN, the device will adjust its input Data format to the output Data format and then set it to SDOUT. (SDIN is always input and SDOUT is always output)

    If the Bypass mode is set, then the Input port data will pass to the Output port regardless of the Port mode, without any sample rate or data format adjust.

    Best regards,
    Iván Salazar
    Texas Instruments
  • 0 in reply to Ivan Salazar
    Guru 36490 points

    Hi Ivan-san,

    Thank you for explaining so politely.
    I understood and will inform our customer of your information.

    Best regards,
    Kato

  • 0 in reply to Ivan Salazar
    Prodigy 155 points

    Just stumbled on this: suddenly something that never made sense over a decade ago fell into place. I used the SRC4193 when it just got released and the datasheet didn't (still doesn't) mention the requirement for synchronous clocks for bypass mode, and there was no user guide yet.

    What I found to puzzlement was that if the output clock port is set to master, even in bypass mode the output clocks were still derived from RCKI and not merely buffered from input clock port as I had expected. With RCKI set to e.g. 256x 48kHz and a 44.1kHz source, in bypass mode the SRC still derived the output clocks from RCKI so 44.1kHz LRCKI was 48kHz on LRCKO. The synchronous clock requirement now explains it, although it does limit the usefulness of the bypass mode somewhat for some applications where one would like to e.g. compare the effect of the SRC between a DIR and a DAC with PLL-based MCK such as PCM5101, with RCKI on the SRC fed by a free-running oscillator. Switching bypass mode on and off would be useful to use as comparison, but this is only possible if RCKI is driven from the DIR's recovered MCKO, which kind of limits the effect of experimenting with jitter reduction.