Hi,
Our customer observed the spectrum of the TLV320ADC3001 conversion data,
and they found some peaks on particular frequency from 3 kHz to 5 kHz and from 10 kHz to 20 kHz.
They thought its peaks were the idle tone, tuned Dither Control Register.
Fortunately, The peaks were disappeared, but they had some questions as follows.
Q1. There is individual difference in the idle tone of TLV320ADC3001.
How should they decide the level and polarity of Dither Control Register?
Q2. Measuring DC dither level seems to be bigger than Dither Control Register settings.
Where will the DC dither be injected?
Q3. How much will be the maximum of DC offset by ADC, PGA and the DC dither?
How much should they have the design margin about the DC offset?
In addition, I already recommended that they employ a first order high pass filter in miniDSP to remove the DC offset.
best regards,
Akio Ito
