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tlv320aic3254: no bclk output

Other Parts Discussed in Thread: TLV320AIC3254

Hi,

We are using tlv320aic3254 audio codec in our custom board.
We have configured tlv as Master & feeding 24MHz clk as MCLK to codec.
 
But we are not able to get any bclk & wclk from codec.
 
The following voltages are provided to TLV  

AVdd: 1.8V (internal/external both options we tried)
DVdd: 1.8V
LDOIN: 3.3V
IOVDD: 3.3V


We are using sound/soc/codecs/tlv320aic32x4.c driver present in 3.10 kernel.
It seems the register are configuring properly.

Please help us.
 
Thanks,
Praveen
 

  • Hi Praveen,

    Could you provide your register configuration please? Did you configure BCLK and WCLK as outputs in Page 0/ Register 27: Audio Interface Setting Register 1?

    Thank you.

    Best regards,

    Luis Fernando Rodríguez S.

  • Hi Luis,

    The following values are using for 11.05KHz sample frequency:

    Reg(AIC32X4_NDAC: 11) value= 0x90
    Reg(AIC32X4_MDAC: 12) value= 0x81
    Reg(AIC32X4_BCLKN: 30) value= 0x90
    Reg(AIC32X4_DOSRMSB: 13) value= 0x2
    Reg(AIC32X4_DOSRLSB: 14) value= 0x0
    Reg(AIC32X4_PLLJ: 6) value= 0x7
    Reg(AIC32X4_PLLDMSB: 7) value= 0x14
    Reg(AIC32X4_PLLDLSB: 8) value= 0x90
    Reg(AIC32X4_PLLPR: 5) value= 0xa1
    Reg(AIC32X4_NADC: 18) value= 0x20
    Reg(AIC32X4_MADC: 19) value= 0x04
    Reg(AIC32X4_AOSR: 20) value= 0x40
    Reg(AIC32X4_BCLKN: 30) value= 0x90
    Reg(AIC32X4_IFACE3: 29) value= 0x1
    Reg(AIC32X4_IFACE1: 27) value= 0xc
    Reg(AIC32X4_CLKMUX: 4) value= 0x3

    Thanks,
    Praveen
  • Our problem resolved, we were missing to set the 0x3f register  for powering up the left and right dac channel.