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Not receiving expected input data stream from TLV320AIC34.

Other Parts Discussed in Thread: TLV320AIC34

Hello,

We've implemented hardware based the SLAA449A application note to interface the TLV320AIC34 to and MSP430.  We have successfully used this interface to send data to the TLV320AIC34 to generate wave forms from test data so we are fairly confident that the glue-logic interface circuit is working.  However, when we try to use the TLV320AIC34 to sample an input differential signal, the data we receive does not seem reasonable.  Here is the TLV320AIC34 register configuration I used to put the codec into a mode where I believe it should be doing differential input using the LINE1LP_A and LINE1LM_A inputs:

Register   Addr    = Value
Register  7 (0x07) = 0x80
Register  9 (0x09) = 0xC0
Register 10 (0x0A) = 0x00
Register  3 (0x03) = 0x41
Register  4 (0x04) = 0x10
Register  5 (0x05) = 0x00
Register  6 (0x06) = 0x00
Register 11 (0x07) = 0x01
Register  2 (0x02) = 0x22
Register 24 (0x18) = 0x78
Register 19 (0x13) = 0x84
Register 15 (0x0F) = 0x00

Here is an oscilloscope trace of the input signals:

CH1 = LINE1LP_A (Yellow)

CH2 = LINE1LM_A (Blue)

CH1 - CH2 = difference (RED)

When I look at the 16-bit values that I've received from the codec, the values are much smaller than I think they should be and almost look like a low level DC reading.  I see a stream of values that range from 0x0029 up to 0x002C.

The input signals look okay to me and I would expect to see something close to mid-range or more given the input differential signal peak-peak is about 1.34v.

What am I missing here?  Is there some other register setting required to get the input signal path enabled though to the digital output stream?

Thanks,

Chris

  • Hi, Chris,

    I already checked your register configuration and it seems to be in order. I tested it in the EVM and it has good results (I obtained a signal with the PC from the EVM). I used a 1KHz sine wave signal to test it. The signal had a 1.34 Vpk-pk. I noticed that the MSB is always low (0x00). When I increase the PGA gain, the data increases too.

    Could you try with different PGA gains and see if the data changes? Additionally, could you try using only one signal in the positive input and GND in the negative input? Finally, could you try using a single-ended input?

    Thank you. If the problem persists, please let me know.

    Best regards,

    Luis Fernando Rodríguez S.

  • Hello Luis,

    Thank you for looking into this.  Unfortunately, it would be difficult to change the input signal on my hardware from the current differential to either of the configurations you suggest.  I'm a little confused about the range of values you were seeing through.  If I read your response correctly, you were saying that you sent in a 1.34v Pk-Pk sine wave and saw the MSB of the data output always zero.  That just seems wrong to me.  I thought the "full scale" would be generated with a signal that was around 1.414v rms.  So by my calculations, you should have been at least 1/3 of full scale with that input signal.  So there should certainly have been some bits set in the MSB of the data.  Or am I messing up the calculations again?

    I guess put another way, given the setup that I've described, what Pk-Pk signal should I input into the codec to get the full scale 16-bit values?  For the differential I figured it would be 4v Pk-Pk where each side of the differential input would be going from 0 to 2v.


    Thanks again for your help on this!

    Chris.

  • Hi, Chris,

    Could you try changing the path to the right channel? I made more tests and it seems that it has different results (MSB is in high state as expected).

    Please let me know if the problem persists.

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi Luis,

    Curious that you got different results with the same signal on different inputs.  I can certainly try the right channel to see if there is any difference.  I'm away from my lab at the moment, so I won't be able to conduct that experiment until Monday.

    In the mean time, do you have any answers to my other questions?  Specifically with regard to the size of the Pk-Pk signal on the differential input to get full 16-bit scale output?  We have some conditioning circuit between our real-world input signal and the codec.  We can adjust the scaling of this circuit to make sure it will generate max Pk-Pk that the codec can handle given our max input signal. 

    Thanks again for your help,

    Chris.

  • Hi, Chris,

    The 16-bit scale output is 0x8000 (for 0V) to 0x7FFF (for IOVDD). However, I suggest to use an input voltage of 0.707Vrms (max) to obtain a good performance of the device. Internally, you can modify the PGA gain to obtain a higher value of the input voltage.

    I hope this helps you. If you still have questions or comments, please let me know.

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi Luis,

    The datasheet calls out an input maximum of 1.414 Vrms for differential input. I'm assuming you were talking of singled ended input above. It would really help me if you could tell me what the expected 16-bit digital output would be for each of the following 4 states of the differential input signals:

    Line1LP = 2v, Line1LM = 2v ==> 16-bit output of 0x????
    Line1LP = 0v, Line1LM = 2v ==> 16-bit output of 0x????
    Line1LP = 2v, Line1LM = 0v ==> 16-bit output of 0x????
    Line1LP = 0v, Line1LM = 0v ==> 16-bit output of 0x????

    I think that if I knew the answers to the above 4 conditions, it would go a long way in helping me understand how the codec is going to interpret the differential signal.

    Thanks,
    Chris
  • Hi Luis,

    I tried using the Right channel as you suggested. It seemed to have exactly the same behavior on my system as the Left channel. The digital values I see in the output stream for the Right channel were between 0x2C and 0x2F. The MSB was always zero. There were essentially the same values I was seeing for the Left Channel. It was good to see that the 16-bit data did switch position in my data stream. I then tried to increase the gain in the Left and Right ADC PGA Gain Control registers. I went from 0db to 10db. The values in the data stream increased from the 0x2c range to 0xD5. Not exactly a 10db increase, but at least there was a change.

    I'm at a bit of a loss as to what to try next. Have you had a chance to dig into the question regarding signal limits and their corresponding digital values that I asked above in my previous post?

    Thanks,
    Chris
  • Hi, Chris,

    I will make some tests and I will answer you as soon as possible. Additionally, have you tried configuring the inputs as single-ended? I mean, have you checked the data from the positive input and from the negative input separately?

    Thank you.

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi Luis,

    I can certainly change the configuration of the registers to select single ended, but the hardware design supplies the differential signal to the codec. I do not believe there is any way for me to force the negative supply to ground.

    Chris.
  • Hi, Chris,

    I already made some tests with the EVM. These are the values that you asked:

    Line1LP = 2v,     Line1LM = 2v     ==>     16-bit output of 0xFFFF
    Line1LP = 0v,     Line1LM = 2v     ==>     16-bit output of 0x8000
    Line1LP = 2v,     Line1LM = 0v     ==>     16-bit output of 0x7FFF
    Line1LP = 0v,     Line1LM = 0v     ==>     16-bit output of 0xFF6C

    These are approached values, but they have sense with the codec behavior. The codec has an internal common mode voltage (the mid-range) which will be added to the differential voltage. For example, the cases 1 and 4 (both lines have the same voltage) the digital output results in the mid-range. However, in the rest of cases, the result is added to the mid-range voltage (in this case 3.3V/2 = 1.65V).

    Please see the next picture for a better comprehension:

    I hope this helps you. If you still have questions, please let me know.

    Best regards,

    Luis Fernando Rodríguez S.

  • Hello Luis,

    I'm still a little confused about how this explanation allows for a 1.414vrms max input on the differential input, but I will need to think about that some more.

    Did you ever get the test setup to generate full scale digital output for the full scale differential analog input?  If I recall, you were having problems on the left channel input.  I was just wondering if there were register configuration issues you discovered in the process.


    Thanks,

    Chris Ingraham

  • Hi, Christopher,

    I checked again the register configuration and it seems to be in order. However, I noticed that the values that you provided (0x0029 to 0x002C) sounds to be around the mid-range. I mean, the codec seems to be around the common mode voltage and not receiving any signal. Have you checked if the codec is receiving the analog signal correctly? Is it possible to route the input signal to the output by the bypass mode? It could be an option to be sure that the signal received properly.

    Best regards,
    Luis Fernando Rodríguez S.