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PCM9211 no S/PDIF on MPO0

Segala Yohann
Prodigy 110 points
Other Parts Discussed in Thread: PCM9211

Hi all, i am trying to do the following

S/PDIF (96 kHz) center tapped input on RXIN0-->DIR-->DIT-->MPO0


here are the rgisters i am setting:


23h@0x00

34h@0x00

42h@0x22

60h@0x11

78h@0x0D


I get a NON valid S/PDIF signal output any ideas why? when i check register CALCULATED SAMPLE FREQUENCY says out of range?

  • 0
    TI__Guru 57800 points

    Hi Segala,

    Sorry for the late response, One of my colleagues is checking your issue, as today is a holiday, he will be able to get back to you by tomorrow.

    Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • 0 in reply to Diego Melendez
    Prodigy 110 points
    I have more news on me trying to debug the problem: when i read register 38h the PFSOUT bits are at 0101 meaning a sampling frequency of 22.05 kHz yet the incomming signal is at 44.1 kHz zero centered. When i force the main output port to take DIR as source clock, register 6Bh@0x11 the I2S data are not present, cleary meaning there is no LOCK OF THE DIR. I highly suspect a clock problem somewhere.

    Lattest information: DIR is not locking on a 44.1 kHz S/PDIF center tapped signal. Clock issues highly suspected, the XTI source is stable and trustworthy it might have to do with clock registers?

    Spent two weeks on this issue i am totally lost.
  • 0 in reply to Segala Yohann
    Prodigy 110 points
    More info on my debugging, i tried the standalone toslink input on RXIN2 and indeed it does work, the register 38 and 39 give out of range sampling frequency yet i have a signal comming out that i routed to an audio amplifier and it works, except that it loses lock of signal once every 5-10 seconds. Something is bugging somewhere...this is a tough one!!!!
  • 0 in reply to Segala Yohann
    TI__Mastermind 27850 points
    Hi Segala,

    I am sorry you are having trouble with our part, let's see if I can help you out.

    What peak to peak voltage is the S/PDIF signal at?

    I would suggest in register 0x61, setting the DIT system clock control to "Controlled by DIR system clock rate"

    I would also suggest trying to route the DIR output to the main output port to see if you get valid I2S data out, this would be a sanity check for your DIR settings.


    Justin
  • 0 in reply to Justin Bohr
    Prodigy 110 points
    Yes DIR seems to work fine, when i enter the PCM9211 with TOSLINK on RXIN2 but not with COAX on RXIN0. My COAX Vpp is 400 mV centered around zero, does the signal need an offset above 0 V?
  • 0 in reply to Justin Bohr
    Prodigy 110 points
    Hi Justin,
    It all works fine now thank you for your help, what was making the system not work is that i designed my entry not knowing that RXIN0 had a 1.4V offset. I didn't find anything mentionning it in the datasheet. It all works as expected now thank you.
  • 0 in reply to Segala Yohann
    TI__Mastermind 27850 points
    Hi Segala,

    I'm glad you were able to find a solution, I assume you are not using our EVM for these tests as we have a AC decoupling cap on the input of the coax input which would mitigate this. The standards for SPDIF and AES over coax are what define the inputs behavior.

    Justin