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TLV320AIC24 No audio issue

Other Parts Discussed in Thread: TLV320AIC24

The problem : TLV320AIC codec outputs no audio on the Audio Ports after power on initialization. this happens only on may be  300th to 400th power cycle

Part No:TLV320AIC24

DSP used to interface: TMS320VC5470 

TLV320AIC24 codec interface.pdfAttached is the schematics for codec  interface with tms320VC5470 DSP

The I2C lines are not used and are just wired .

Before i go deep into the issue 

I have couple of doubts as below ( datasheets weren't so clear around this area),Please clarify 

  1. Is ACD used only for host port addressing or its even used for mcbsp bus?
  2. Page 14 of the datasheet  depicts a timing ,now if master clk is 4 Mhz and sclk is 1 Mhz ,i wasn't too much suspecting  the timing part of MCBSP Bus, as we would have enough margins due to the fact that data is received and sent on different edges  (one at negative and one at positive).is my understanding correct?
  3. if the answer to question 1 is yes(i.e ACD is also used for MCBSP communication )then Page 14 of the datasheet says reset should be synced wrt to mclk ,would this mean  u44 on the schematics should be triggered at falling edge of mclk  for assuring setup and hold time for the reset pulse to be on safer side to overcome the possible timing violation due to flight time  difference between MCLK and sampled reset signal by u44 at arrival point of codec
  4. On page 24 under the section "System Reset and Power Management" what does "during which the serial port of the DSP must be 3-stated."mean is it about the host interface  or the MCBSP lines?
  5. what is the state of audio outputs on power up ,are they mid point biased?,what could possibly make a situation that the audio output  slowly ramps down to zero volts from a given voltage at the output(other than the output analog switch Turing off)?
  6. Is there a errata for this device (either published or non published)

One exercise  worth mentioning out of 100s that we have done is that the issue gets resolved when we trigger a DSP reset keeping all powers healthy .this would boil down to the fact that re initialization of codec registers  is bringing back the codec to life again .

One we start discussing i can share more info around this 

Regards

Ezekiel 

998662039

  • Hi, Ezekiel,

    Welcome to E2E and thank you for your interest in our products.

    Since I'm only supporting the audio codecs, probably I will not answer your questions about the TMS320VC5470 with details. So, if you need a better help with this device, I would suggest to take a look at the C5000 Ultra Low Power DSP Forum.

    1. The ADC of the TLV320AIC24 can be used with the McBSP Port Bus as described on the TLV320AIC2x-to-DSP interface section of datasheet: http://www.ti.com/lit/ds/symlink/tlv320aic24.pdf#page=45.
    2. Your understanding is correct, McBSP bus timing should be similar to the TLV320AIC24 timing. Additionally, as you already mentioned, you would have enough margins due to the ways of send/receive data.
    3.  If my understanding is correct, the U44 component on your datasheet is used to reset the codecs. So, it would mean that this device should be triggered at falling edge of MCLK as you already mentioned. It is necessary to respect the datahseet timing to avoid any undesirable issue.
    4. This line refers to the serial port of the host processor. The data lines must be 3-stated during the initialization cycle that lasts for 132 MCLKs.
    5. All the audio outputs are 3-stated until they're connected to the DAC output. 
    6. Unfortunately, we don't have an errata of this device. Additionally, if you're interested in more details about a TMS320C54xx McBSP to TLV320AIC24 Interface, you may check the following application report: http://www.ti.com/lit/an/spra957/spra957.pdf.

    I hope this helps you. Please let me know if you have more questions or comments.

    Best regards,
    Luis Fernando Rodríguez S.

  • Hi Luis,

    I Hope you read ACD as ADC ,ACD  was " Automatic cascade detection" algorithm and my doubt was is it only used in case host port is used or also used in MCBSP communication ?

    Regards

    Eze

  • Hi, Eze,

    The Automatic cascade detection algorithm is used with SMARTDM devices. Smart Time Division Multiplexed Serial Port supports this advanced feature (ACD). For more details, please take a look at the Host Port Interface section of datasheet.

    Best regards,
    Luis Fernando Rodríguez S.