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TLV320DAC3120

Other Parts Discussed in Thread: TLV320DAC3120

Hi

what is the current consumption of this chip in AVDD@3.3v and vddio @1.8 v rails it is not clear in the datasheet .has any one used this chip do u have any details regarding this ?

  • AGXIN,

    I moving your request from this forum (Voltage Translation/Level Shifters) to the Audio Converters Forum in order to get the appropriate support. Thanks.

    Best Regards,
    Nirav
  • AGXIN,

    Please take a look at this document. It provides information about the power consumption of these devices:

    www.ti.com/.../slaa468b.pdf

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi Luis Fernando Rodríguez S
    Thanks for the reply, In the datasheet iovdd is used as 3.3 V
    In the processor i am using the i2s interface all are of 1.8v logic
    so i have connected iovdd as 1.8v in the tlv320dac3120 chip ,in the data sheet of tlv320dac3120 the typical value of iovdd is 3.3  shall I use iovdd as 1.8v ?
    The analog input I am not using in my design do i have to terminate it or can be left floating? (not using record and playback ) in this case Do i have to provide AVDD input ?I am not using HP pin as well can I leave this floating?

  • Hi,

    IOVDD voltage range is from 1.1V to 3.6V. This voltage determines the serial data interface and I2C levels. You may use 1.8V even if the typical voltage is 3.3V. Actually, this is the correct voltage since your processor works at 1.8V logic.

    When analog inputs are not used in our codecs, we suggest to connect them to a 0.47uF cap to GND. In case of the analog output pins, they can be left floated.

    Finally, this device needs all power supplies to work correctly. The power supplies must be in the range of the 3.2 Recommended Operating Conditions section of datasheet. So, AVDD must be provided as well.

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi

    Regarding 0.47UF to GND why are we using this to ground is this pins are having any bias voltage can I short it through resistor
    Is it for keeping the input pins in the stable during power ramp during power on
  • Hi

    can I keep the Reset pull up voltage to 1.8V Or do I have to keep as 3.3v
  • Hi,

    That's correct. The 0.47uF capacitor to GND ensure that this bias voltage will be stable when ADC is turning on. We don't recommend to add a resistor since it would demand more current consumption.

    Finally, reset pull-up voltage should be the same than IOVDD. So, you would need to configure IOVDD power supply as 1.8V if you require this voltage.

    Best regards,
    Luis Fernando Rodríguez S.