I have designed a board with the PCM1860 to operate in Master Mode. For testing I have been looking at the I2S signals DOUT, BCK, and LRCK. A problem that I am having is that the 7 LSB never vary, leading me to question what is happening. I also have a PCM1860EVM evaluation kit, and I am seeing the same results. The upper 17 bits vary with signal, but the 7 least signifcant bits are fixed at 0.
I have attached an image showing this (ignore the pink trace). Any thoughts on why the LSB would be fixed at 0, and not at least varying wildly at LSBs tend to do?