TLV320ADC3101 Reduction of aliasing noise

na na78

Guru 16770 points

Other Parts Discussed in Thread: TLV320ADC3101

We are using TLV320ADC3101 with custom board but we are facing to problem of noise.

It seems to be aliasing noise.

We attached the file.

Aliasing_noise.xlsx

INPUT : Analog wave (THD+N=0.1%)
Fs = 48KHz
There was no error in AC timing.

This device may have anti-aliasing filter.
Do you think the noise can be eliminated using anti-aliasing filter in the processing block?
If so, could you tell us how to activate anti-aliasing filter?

Bestregards

over 7 years ago

0 Luis Fernando Rodriguez S. over 7 years ago

TI__Guru* 84915 points

Hello, na,

This should be related with the clock registers configuration. The PLL conditions should be respected as mentioned in section 10.3.7 Audio Clock Generation of datasheet. This section explains that the PLL output should be 80 MHz ≤ (PLLCLK _IN × K × R / P) ≤ 110 MHz. So, I would recommend to configure the PLL and dividers with the suggested values of Table 1. Typical MCLK Rates. Please take a look at the recommended values for fs = 48KHz and MCLK = 3.072MHz.

Best regards,
Luis Fernando Rodríguez S.

0 na na78 over 7 years ago in reply to Luis Fernando Rodriguez S.

Guru 16770 points

Hi Luis

Thank you for your reply.

We tried the condition on the datasheet, but 1KHz wave seemed to degrade.

ADC3101_aliasing_v2.xlsx

P=1

R=1

J=32

D=0

NADC=8

MADC=2

AOSR=128

IADC=188

Do you have idea for improvement?

Are there any problem in register setting?

We appreciate for your help.

BestRegards

0 Luis Fernando Rodriguez S. over 7 years ago in reply to na na78

TI__Guru* 84915 points

Hi, na,

I would recommend to reduce the instructions IADC from 376 (0xBC in page 0 / register 21) to 188 (0x5E in page 0 / register 21). It is necessary to respect the condition MADC x AOSR > IADC.

Please let me know if the problem persists.

Best regards,
Luis Fernando Rodríguez S.

0 na na78 over 7 years ago in reply to Luis Fernando Rodriguez S.

Guru 16770 points

Hi Luis

Thank you for your advice.

we could confirm the result has been improved.

If it's possible, we want to suppress the remaining noise.

ADC3101_aliasing_v3.xlsx

Can we still have rooms for improvement?

(changing PRB, using FIR filter, and so on)

Could you give me tips if you have idea?

BestRegards

0 Luis Fernando Rodriguez S. over 7 years ago in reply to na na78

TI__Guru* 84915 points

Hi, na,

Some of the software solutions to modify the signal quality and noise are the processing blocks as you mentioned. Several processing blocks have better performance than others. So, I would recommend to try some of them and compare the results.

Regarding the hardware solutions, you may take a look at this wiki article. It contains information about how to reduce noise issues in codecs:

e2e.ti.com/.../3377.common-noise-issues-in-codecs

Best regards,
Luis Fernando Rodríguez S.

0 na na78 over 7 years ago in reply to Luis Fernando Rodriguez S.

Guru 16770 points

Hi Luis

Thank you for your advice.

We'll test several PRB.

By the way, we noticed that ADC CIC Filter Gain Control register (Page 0 / Reg 59) has some constraints for setting.

Does it also need to be set properly?

BestRegards

0 Luis Fernando Rodriguez S. over 7 years ago in reply to na na78

TI__Guru* 84915 points

Hi, na,

Effectively. There's a note below Table 61 (Page 0 / Register 59 : ADC CIC Filter Gain Control). This gives details about the filter gain and its restrictions. Please follow the indications of this section in order to set it properly.

Best regards,
Luis Fernando Rodríguez S.

Audio

Audio forum

TLV320ADC3101 Reduction of aliasing noise