I'm planning on non-audio frequency sampling, and have read everything I can find (including this forum) on clocking interactions in the PCM1864, and am still vague on some of the interactions. I am planning on using master mode 4-channel TDM with an input SCK of 38.4MHz, desired sample rate is either 50kHz or 75kHz (either is fine). By the data sheet BCK can be 6.667 MHz max, but I'm not sure of max-min or norminal clock settings for DSP1, DSP2, or the ADC. I know LRCLK_div should be 256 since I'm in TDM mode. I don't think I need the PLL (the input SCK is very high quality).
Q1: Since BCK is 6.4MHz max in master mode, does that mean my max sample rate is ~26kHz (6.667MHz/256)?
Q2: Should DSP1 and DSP2 clocks always be equal?
Q3: Should the ADC clock always be slower than the DSP clocks? By some factor? Divided from the same source?
Q4: What are the maximum frequencies for the ADC and DSP clocks?
Q5: Any recommendations for my clock setup?
Thanks!
Tim Burnett