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TLV320ADC3101 Driver support for TDA2EX?

Other Parts Discussed in Thread: TLV320ADC3101, TLV320AIC3101

Hi Guys,

We are having custom TDA2EX board, on board we are having TLV320ADC3101, but while going though kernel i was not able to find any driver.

Background:

TDA2EX Custom board,

SDK -> VISION_SDK_02_11_00

KERNEL -> 3.14 (glsdk_07_00_04_03)

UBOOT -> 2014

Upon some search came across:

regards,

Ganesh

  • Hi, Ganesh,

    Unfortunately, we are not providing support to the linux drivers. All the information that we have about the drivers is located at the following wiki article and links:

    e2e.ti.com/.../266169

    github.com/.../codecs

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi ,

    Sorry i didn't reply as i was busy in some other task. Even if i follow wiki link you shared i have some question on that,

    1-> Can we write driver for adc3101 by using tlv320aic3101.c as base or any other nearest driver which can be used as base?

    2-> what about dsp in adc3101?

    3-> while going through old source code in that aic3256_firmware_load which is looking for tlv320adc3x01_slave_v1.bin file? Does ti provide firmware file?

    4-> if we use aic3101 as base then what about registers. what will be optimal values for all register?

    5-> adc3101 driver can be register as platform_driver or i2c_driver. confused?

    regards,
    Ganesh
  • Hi, Ganesh,

    The TLV320AIC3101 and TLV320ADC3101 have a different register map. So, I think that the TLV320AIC3101 cannot be used as a base to configure the TLV320ADC3101.

    I would recommend to verify which functions of the ADC3101 you want to configure. I mean, the analog inputs, ADC channels, AGC, PLL, etc. I can provide a possible register configuration that you may use as a base to create your own driver. Regarding the miniDSP section, you may use our PurePath Studio software ( www.ti.com/.../aicpurepath_studio ). This software is used to configure the miniDSP. Also, it may provide a .C code that contains all the necessary registers to configure the ADC3101.

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi ,

    We are going for IN2L(P) -> Left PGA -> Left ADC -> Left AGC and MICBIAS2. Only one Mic input being used.

    1-> Do we require seperate binary firmware file for miniDSP?

    I found one post where you mention we don't reguire binary firmware file please confirm

    https://e2e.ti.com/support/data_converters/audio_converters/f/64/p/553227/2024534#2024534


    2-> Above register values for ADC3101 is sufficient for miniDSP too?


    3-> what about driver which we can use as base or we have to start with scrap?

    so can we use aic32x4 as base? base on below link i'm asking

    https://e2e.ti.com/support/data_converters/audio_converters/f/64/p/479643/1727665#1727665

    Regarding PurePath Studio Software i will try take a look into that.

    regards,
    Ganesh

  • Hi, Ganesh,

    Please take a look at the attached script. It is a register configuration that may be useful for you to configure the ADC3101. It is in hex format w (write) 30 (I2C address) xx (register address) yy (register data).

    ADC3101_Script.txt
    ###############################################
    # Software Reset
    ###############################################
    #
    # Select Page 0
    w 30 00 00
    #
    # Initialize the device through software reset
    w 30 01 01
    #
    # Delay 100mS
    d 100
    ###############################################
    
    ###############################################
    # Clock Settings
    # ---------------------------------------------
    # The codec receives: MCLK = 11.2896 MHz,
    # BCLK = 2.8224 MHz, WCLK = 44.1 kHz
    ###############################################
    #
    # Select Page 0
    w 30 00 00
    #
    # NADC = 1, MADC = 2
    w 30 12 81 82
    #
    # AOSR = 128 (default)
    #
    ###############################################
    
    ###############################################
    # Audio Settings 
    ###############################################
    #
    # Default Setting: I2S, 16-bits, Slave Mode (BCLK and WCLK are inputs), 3-stating of DOUT disabled
    w 30 1b 00
    
    ###############################################
    # Signal Processing Settings
    ###############################################
    #
    # Select Page 0
    w 30 00 00
    #
    # Set the ADC Mode to PRB_P1 (default)
    w 30 3d 01
    #
    ###############################################
    
    ###############################################
    # Recording Setup
    ###############################################
    #
    # Left ADC Vol = 0dB
    w 30 53 00
    #
    # Right ADC Vol = 0dB
    w 30 54 00
    #
    # Select Page 1
    w 30 00 01
    #
    # Mic Bias to AVDD
    w 30 33 18
    #
    # Left ADC Input selection for Left PGA = IN1L(P) as Single-Ended
    w 30 34 f3
    #
    # Left Analog PGA Seeting = 0dB
    w 30 3b 00
    #
    # Right Analog PGA Seeting = Mute
    w 30 3c 80
    #
    # Select Page 0
    w 30 00 00
    #
    # Power-up Left ADC
    w 30 51 82
    #
    # Unmute Left ADC Channel (Gain = 0dB)
    w 30 52 08
    

    1. As mentioned in the E2E thread that you copied, there's no need to use a separate binary firmware file.

    2. The miniDSP require additional configuration. You may get the necessary registers with the help of PurePath Studio. For more information, please consult the wiki article below:

    https://e2e.ti.com/support/data_converters/audio_converters/w/design_notes/3320.getting-started-on-purepath-studio

    3. You may use the AIC32x4 as a base. It has similar ADC configuration.

    Best regards,
    Luis Fernando Rodríguez S.

  • Hi ,

    clarification:

    1-> My MCLK is 19.2MHz, still can i use register and its values you provided in script.txt file or do i have to change any register.

    2-> w 30 12 81 82 --> It symbolises that w 30 12 81 and w 30 13 82 right?

    Question:

    1-> fs can be 44.1khz and 48khz. can you provide register settings for both. It is not finalised sampling rate but still i want both register values?

    regards,
    Ganesh
  • Hi, Ganesh,

    1 -> You would require other values to use 19.2MHz (see two attached documents to get an fs = 44.1KHz and 48Khz with a MCLK = 19.2MHz).

    2 -> You are correct. That code line symbolizes consecutive registers (you may find another example of this format in the attached scripts).

    ADC3101_Script_44_1KHz.txt
    ###############################################
    # Software Reset
    ###############################################
    #
    # Select Page 0
    w 30 00 00
    #
    # Initialize the device through software reset
    w 30 01 01
    #
    # Delay 100mS
    d 100
    ###############################################
    
    ###############################################
    # Clock Settings
    # ---------------------------------------------
    # The codec receives: MCLK = 19.2 MHz,
    # BCLK = 2.8224 MHz, WCLK = 44.1 kHz
    ###############################################
    #
    # Select Page 0
    w 30 00 00
    #
    # NADC = 8, MADC = 2
    w 30 12 88 82
    #
    # AOSR = 128 (default)
    #
    # PLL_CLKIN = MCLK; CODEC_CLKIN = PLL_CLK
    w 30 04 03
    #
    # J = 4; D = 7040; P = 1; R = 1
    w 30 05 91 04 1b 80
    #
    ###############################################
    
    ###############################################
    # Audio Settings 
    ###############################################
    #
    # Default Setting: I2S, 16-bits, Slave Mode (BCLK and WCLK are inputs), 3-stating of DOUT disabled
    w 30 1b 00
    
    ###############################################
    # Signal Processing Settings
    ###############################################
    #
    # Select Page 0
    w 30 00 00
    #
    # Set the ADC Mode to PRB_P1 (default)
    w 30 3d 01
    #
    ###############################################
    
    ###############################################
    # Recording Setup
    ###############################################
    #
    # Left ADC Vol = 0dB
    w 30 53 00
    #
    # Right ADC Vol = 0dB
    w 30 54 00
    #
    # Select Page 1
    w 30 00 01
    #
    # Mic Bias to AVDD
    w 30 33 18
    #
    # Left ADC Input selection for Left PGA = IN1L(P) as Single-Ended
    w 30 34 f3
    #
    # Left Analog PGA Seeting = 0dB
    w 30 3b 00
    #
    # Right Analog PGA Seeting = Mute
    w 30 3c 80
    #
    # Select Page 0
    w 30 00 00
    #
    # Power-up Left ADC
    w 30 51 82
    #
    # Unmute Left ADC Channel (Gain = 0dB)
    w 30 52 08
    

    ADC3101_Script_48_KHz.txt
    ###############################################
    # Software Reset
    ###############################################
    #
    # Select Page 0
    w 30 00 00
    #
    # Initialize the device through software reset
    w 30 01 01
    #
    # Delay 100mS
    d 100
    ###############################################
    
    ###############################################
    # Clock Settings
    # ---------------------------------------------
    # The codec receives: MCLK = 19.2 MHz,
    # BCLK = 2.8224 MHz, WCLK = 44.1 kHz
    ###############################################
    #
    # Select Page 0
    w 30 00 00
    #
    # NADC = 8, MADC = 2
    w 30 12 88 82
    #
    # AOSR = 128 (default)
    #
    # PLL_CLKIN = MCLK; CODEC_CLKIN = PLL_CLK
    w 30 04 03
    #
    # J = 4; D = 7040; P = 1; R = 1
    w 30 05 91 05 04 b0
    #
    ###############################################
    
    ###############################################
    # Audio Settings 
    ###############################################
    #
    # Default Setting: I2S, 16-bits, Slave Mode (BCLK and WCLK are inputs), 3-stating of DOUT disabled
    w 30 1b 00
    
    ###############################################
    # Signal Processing Settings
    ###############################################
    #
    # Select Page 0
    w 30 00 00
    #
    # Set the ADC Mode to PRB_P1 (default)
    w 30 3d 01
    #
    ###############################################
    
    ###############################################
    # Recording Setup
    ###############################################
    #
    # Left ADC Vol = 0dB
    w 30 53 00
    #
    # Right ADC Vol = 0dB
    w 30 54 00
    #
    # Select Page 1
    w 30 00 01
    #
    # Mic Bias to AVDD
    w 30 33 18
    #
    # Left ADC Input selection for Left PGA = IN1L(P) as Single-Ended
    w 30 34 f3
    #
    # Left Analog PGA Seeting = 0dB
    w 30 3b 00
    #
    # Right Analog PGA Seeting = Mute
    w 30 3c 80
    #
    # Select Page 0
    w 30 00 00
    #
    # Power-up Left ADC
    w 30 51 82
    #
    # Unmute Left ADC Channel (Gain = 0dB)
    w 30 52 08
    

    Best regards,
    Luis Fernando Rodríguez S. 

  • Hi, Ganesh,

    Please ignore the clock settings comments in the 48KHz script. The correct comments should be MCLK = 19.2MHz; BCLK = 3.072MHz and WCLK = 48KHz.

    Thank you.

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi ,

    Thanks for your help. I have started writing driver.

    From ADC3101 reset pin is connected to dedicated rstoutn pin on TDA2Ex. 

    As you know that we have to provide some delay after reset.

    But if i look at aic32x4 code,

    if (aic32x4->rstn_gpio >= 0) {
                     ret = devm_gpio_request_one(&i2c->dev, aic32x4->rstn_gpio, GPIOF_OUT_INIT_LOW, "tlv320aic32x4 rstn");
                     if (ret != 0)
                             return ret;
     }

    it is looking for normal gpio pin, how can we access rstoutn. In dts file their is nothing available rstoutn.

    regards,
    Ganesh

  • Hi, Ganesh,

    Probably, the GPIO is being used as read bit. It seems to be an instruction to indicate that a reset must be applied. It is also possible to use a software reset. The GPIO seems to be an indicator to determine if the user is requesting a software reset.

    Best regards,
    Luis Fernando Rodríguez S.
  • Hi ,

    I understood what you said. But my question is how can we use rstoutn pin, their is no pinmux of rstoutn in dts file.


    ret = of_get_named_gpio(np, "gpio-reset", 0);

    Like above api which is looking "gpio-reset" in dts file where we assign gpio pin which is used for reset purpose.

    In same way, rstoutn[tda2ex] pin can be used to reset.

    what will be the api will be used to get rstoutn pin and in dts file for adc3101@ gpio-reset=????

    Edit1: I'm using latest vision_sdk 02_12 with kernel 4.4.


    regards,
    Ganesh
  • Hi, Ganesh,

    Unfortunately, since we don't support the Linux environment, we don't have enough information about this issue.

    Best regards,
    Luis Fernando Rodríguez S.