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TLV320ADC3101EVM-K: 2 Mic input, MCLK 12 Mhz PLL & ASI setting

Part Number: TLV320ADC3101EVM-K
Other Parts Discussed in Thread: TLV320ADC3101,

Using TLV320ADC3101 but has problem on 12MHz master clock using.

Main issue is MIC has max volume without any sound input.

I summarized issue in attached PPT file so please refer attached. (Attached also record waveform and other data)

TLV320ADC3101_2Mic ISSUE.pptx

I tested all the PLL setup.

Calculate ADC3001/3101 Clock Configuration(BCLK 521kHz, 1.024Mhz, 2.048Mhz)

MCLK : 12Mhz(Input)

BCLK : 512Khz(Output)

WCLK : 16Khz(Output)


 

1. Is the unit operable by means of a 12Mhz MCLK input?

- BCLK : 512Khz(Output), WCLK : 16Khz(Output), 16bit data rate, 2 Mic(stereo)

2. If possible, can you find my problem in my setup?