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PCM1861: PCM1861: No sound

Part Number: PCM1861
Other Parts Discussed in Thread: PCM5100

Hello,

I am interfacing PCM1861 and PCM5100 to ADAU1701 audio processor. The audio processor is using a 12.288MHz crystal and the sampling rate is set to 48KHz

The ADAU1701 is I2S clock master and both the ADC and the DAC are slaves and share the BCLK and LRCLK lines.

I have no issues with the PCM5100 and it is working correctly.

However, there is no sound from the ADC.

I have attached the schematics of the ADC and the DAC sections.

Do let me know if you need any further information from my side.

Thanks!!PCM1861 issue.doc

Ravindra.

  • Hi, Ravindra,

    I have reviewed the schematic and it seems that there is no SCK signal or XTAL connected to the device, what makes me think that you are trying to operate the PCM1861 in BCK Input Slave PLL Mode. Unfortunately, the PCM1861 does not support this operating mode as it is only supported by software controlled devices of the PCM186x family of audio ADCs. This is mentioned in the table of PCM186x Clocking Modes section of the datasheet. A SCK or XTAL clock is required for the PCM1861 to operate. 

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

    EDIT: The PCM1861 supports BCK Input Slave PLL Mode.

  • Hello Diego,

    Thank you for your early reply.

    Yes, the Clocking modes section of the datasheet does have a table that suggests that the PCM1861 needs an external XTAL/ MCK input both in MASTER and SLAVE mode.

    However, in the same document, in the Detailed discription--->Overview it says:

    'BCK PLL available to avoid using External SCK'

    Also, in the same document, in the last paragraph of section Clocks----> Description it says:

    'The PCM186x also differentiates itself by integrating an on-chip Phase Locked Loop (PLL) that can generate real audio-rate clocks from any clock source between 1MHz and 50MHz.. The PCM1861 hardware-controlled devices have the ability to detect an absence of MCK in Slave Mode and automatically generate a MCK signal.'

    This led me to believe that the PCM1861 is unique and does not require an MCK.

    Regards,

    Ravindra.

  • Hi, Ravindra,

    Thanks for the feedback and sorry for the confusion, The content in the datasheet is confusing and we will clarify this in further revisions.

    You are right in your approach, it seems the PCM1861 should be able to operate without SCK. I tested this in the EVM and the PCM1861 is able to work in 3-wire mode as long as the values are compliant with the relationship between BCK and LRCK indicated in Auto PLL BCK Requirements table. We need to update the Clocking Modes table mentioned before.

    Going back to your original question, the PCM1861 should be able to operate correctly in your system with 3-wire mode.

    Could you please share the BCK and LRCK frequencies used in your system?. Could you please measure the voltage in VREF and LDO pins?. Do you have any capture of the DOUT signal?. 

    Sorry for the confusion,  best regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Hello Diego,

    The measured values of Vcc = 3.3V, Vref = 1.641V and LDO = 1.9V.
    My audio processor is configured for fs = 48KHz and is set to output BCK = 3.07MHz and LRCK = 48KHz.

    My other observation is that on power cycling, sometimes, there is audio output for very very short time and it fades out into silence/ mute.

    Regards,

    Ravindra.