• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 30 subscribers
  • Views 646 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PCM1865: Secondary ADC issues

Paulo Steigleder
Prodigy 20 points
Part Number: PCM1865

I'm using PCM1865 hooked to a STM32L433. Audio channels are working well using TDM transfer, but I can read anything from Secondary ADC, which I would use to read battery current. I selected the input (CH3L) on REG 0x0A, tryed various settings on REG 0x58, but every time I read REGs 0x59 & 0x5A I get 0x0000. Is there another setting I'm missing?

Regards, Paulo

  • 0
    TI__Guru 57800 points

    Hi, Paulo,

    Welcome to E2E, Thanks for your interest in our products!.

    In order to read a DC value, you need to setup the channel you are monitoring to detect DC level-change; this is done by configuring register 48. The data assigned will be streamed through TDM.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer 

  • 0
    Prodigy 20 points

    Hi, Diego,

    Thanks for your prompt response.

    I wish to use Secondary ADC thru SPI registers, not TDM. I read TDM data using a DMA access which consumes some RAM memory buffer. This assures high speed transfer of the audio data (actually is accelerometer data - we are using PCM1865 as an front end for a vibration analyzer). As battery current has a low data rate requirement, I would read it using registers 0x59 & 0x5A and not spend more RAM for reading in high speed a low data rate signal. Is this possible? If it's possible, how I configure register 0x58?

    Regards, Paulo.

  • 0 in reply to Paulo Steigleder
    TI__Guru 57800 points

    Hi, Paulo,

    Thanks for the feedback. The value read by the PCM1865 Secondary ADC while being used in Controlsense mode can be read in two ways.

    The first one is a direct 8-bit format data that is available in Register 0x4E for CH3L at any time, as long as CH3L is selected as the input of secondary ADC with Register 0x0A, DC level-change detection is selected for CH3L in register 0x30 and latch operation is disabled in Register 0x58.

    The second option is a direct 16-bit two's compliment reading from Registers 0x59 and 0x5A. In order to perform this, you need to set the CH3L as the secondary ADC input in Register 0x0A, disable the latch operation and select the DC-value channel to CH3L in register 0x58. Then, toggle bit 4 of register 0x58 to load the values of the secondary ADC data into registers 0x59 and 0x5A. 

    Hope this information is useful.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer