TLV320ADC3101: Where to Start to get a setup for the registers in the TLV320?

Diego,

Thanks for the prompt reply, I'll download PPS and check it out.

Ted

Hi, Ted,

Unfortunately, the tool requires the 'ADC3101EVM to be connected in order to track the register commands required for the device configuration. I would recommend you to look at the recording scripts as reference and then modify them per your system design needs.

Best Regards,

  -Diego Meléndez López
   Audio Applications Engineer

Hi, Ted,

Thanks for the clarification! please let us know if you have further questions.

Best Regards,

  -Diego Meléndez López
   Audio Applications Engineer

Although I got a full initialization done for the TLV320 I got no streaming I2S; it turns out my design was messed up because it sent 3.3 volts to DVDD and that is in process of being corrected with an LDO.  I'll report back when this is done.

Diego,

I've gotten this to the point where I think it should be working but I'm getting no signals out of the TLV320, the BCLK line sits high and the WCLK & DOUT lines sit low.  All I'm doing is feeding a stereo signal (from an iPad) into IN1R and IN1L and I'm feeding a 12 MHz clock into MCLK. I tried to follow the example code that starts on page 80 of the datasheet with the main difference that I'm using MCLK as an input to drive the PLL.  Can you please take a look at my setup script and see if you can spot what I'm doing wrong?

Note that m I2C routine has functions that can write 1 or 2 bytes at once - I've tried reading back registers after I've written them and I do get back what I wrote so it looks near certain that I2C is working properly.  I send the register parameter as a decimal number as that's how they are listed in the datasheet but I send the values as hex because it's easier to translate them to binary in my head.

void setupTLV320(void)
{   
    // the values and the order they are written in is taken from page 79-81 of DS (para 11.2.2.2)
    I2C_Write1(TLV320_ADDR, 0x00, 0x00); // set TLV320 to page 0
    I2C_Write1(TLV320_ADDR, 0x01, 0x01); // trigger soft reset the TLV320 will come out of reset on its own
    CyDelay(100);                        // but it needs time so wait 0.1 seconds for device (may be unecessary)
    // table 1 on page 23 of DS gives parameters
    // MCLK = 12 MHz, P=1, R=1, J=7, D=5264, Achieved Fs = 441. kHz
    I2C_Write1(TLV320_ADDR, 4, 0x00);        
    I2C_Write1(TLV320_ADDR, 5, 0x11);        // p47 - P = 1, R = 1
    I2C_Write1(TLV320_ADDR, 6, 0x07);        //       J = 7
    I2C_Write2(TLV320_ADDR, 7, 0x14, 0x90);  //       D = 5264 = 0x1490 (Note this sends 2 bytes out in 1 write)
    I2C_Write1(TLV320_ADDR, 5, 0x91);        //       Pwr on to PLL and P = 1, R = 1
    I2C_Write2(TLV320_ADDR, 18, 0x88, 0x82); // p48 - NADC Pwr On and Val = 8, MADC Pwr On and Val = 2 (Note this sends 2 bytes out in 1 write)
    I2C_Write1(TLV320_ADDR, 20, 0x80);       // AOSR = 128    
    I2C_Write1(TLV320_ADDR, 27, 0x0B);       // I2S, 16 bits, BCLKop WCLKop DoutEn
    I2C_Write1(TLV320_ADDR, 61, 0x01);       // use PRB 01 (processing block)
    
    I2C_Write1(TLV320_ADDR, 0, 0x01);        // Set register Page to 1
    I2C_Write1(TLV320_ADDR, 51, 0x00);       // Set MICBIAS to not used
    // Program PGA level
    I2C_Write2(TLV320_ADDR, 59, 0x1E, 0x1E);  // Set Left, Right Analog  00 = 0dB 0x1E = +15dB (2 locations set)
    // Program routing of inputs/common mode to ADC input
    I2C_Write1(TLV320_ADDR, 52, 0xFC);        // Left ADC Input selection for Left PGA = IN1L(P) as Single-Ended
    I2C_Write1(TLV320_ADDR, 55, 0xFC);        // Right ADC Input selection for Right PGA = IN1R(M) as Single-Ended
    // Unmute analog PGAs and set analog gain
    I2C_Write1(TLV320_ADDR, 0, 0x00);        // set TLV320 back to page 0
    I2C_Write1(TLV320_ADDR, 81, 0xC2);       // Power up ADC channel
    I2C_Write1(TLV320_ADDR, 82, 0x00);        // Unmute digital volume control and set gain = 0 dB
}

Diego,

Thanks for the review, I made the changes you suggested making the value written to register 30 (page 0) to 0x88.  Now I get the BCLK/WCLK at 1.41 MHz/44.1 kHz which is what I expected (I think those are good) but the data line stays low - either it's not configured correctly or the input is muted/the gain is too low.  I'm going to check the register settings but, given I feed a iPad stereo output straight into the IN1R/L inputs through 1 uF series capacitors, what sor of gain settings will reflect 'normal' listening volumes? Any idea?

Diego,

Forget my last message - I found that I was trying to unmute the Aux in by writing to register 0x82 instead of 82, problem is solved and it sounds AWESOME!

Thanks for all your help :D

Have a great holiday break

Ted

Hi, Ted,

Thanks for the feedback, we are glad to hear you are able to hear the digital audio from the device. Please let us know if you have further questions!

Thanks, happy holidays!.

Best Regards,

  -Diego Meléndez López
   Audio Applications Engineer