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TLV320AIC3101: TLV320AIC3101

Part Number: TLV320AIC3101
Other Parts Discussed in Thread: TLV320AIC3254,

Hi!

Some months ago i talked to Steve Wilson69 here at e2e-forum regarding helping me to configure the audio codec so that it fits my need. Is that still possible? I have two eager students that wants to do an application. But the configuration of the audio codec should not be the may task. 

 

Best regards / Christoffer Cederberg (Research engineer at Lund University)

  • Christoffer,

    I would be happy to help, please let me know what you are wanting to do with the codec. (which inputs and outputs, sample rate, clock sources etc..)

    best regards ,
    -STeve Wilson
  • Hi!

    Thanks! I am amazed by the fast responses here! 

    I have tried to attach a pdf containing the schematic, do not know if it was successful though. The clock will be provided by a FPGA. Either 12 or 16 MHz. The sampling rate is not of great importance since this is a prototype. Input on Left input 1  and Right input 1 (single ended) pin 10 and 12. Output on High-power output driver (left +) and High-power output driver (right +) pin 23 and 19. If it is possible i would like to have to versions. one where the sampled data is sent over  I2S to be processed and sent back for playback and another version where the sampled data is directly sent for playback. 

    Also, if it is not to much to ask for. It would be super nice if there were some comments so I (or the students) easly can modify the initialization. For example, changing the frequency of the clock sourse, AD/DA resolution and sample rate.  

    Again, thanks a lot for providing this service. It makes life so much easier!  And if you can't access the pdf-file and you would like to, just notify me!

    Kind regards / Christoffer

    TLV320AIC3101_Sch.PDF

  • Christoffer,

    I can See the schematic, and I will take a closer look tomorrow.

    Providing a configuration with comments is no problem.

    regarding the two versions, you said "one where the sampled data is sent over I2S to be processed and sent back for playback and another version where the sampled data is directly sent for playback. "
    if I understand correctly you want the AIC3101 ADC DATA to get sent on DOUT to be processed, and then DIN is the return form the processor for playback.
    the second version you want the ADC DATA to go strait to the DACS for playback? The AIC3101 doesn't have a digital passthrough function, so the DOUT would have to be shorted to the DIN for this to happen.

    best regards,
    -Steve Wilson
  • Hi! Yes that is correct! Aha, then I'll short the DOUT and DIN, no problem. I just thought that this was possible because of the switches SW-D1 and SW-D2 in functional block diagram in the data sheet. Maybe I can add another version where the mic is the input?

    Kind regards / Christoffer

  • Christoffer,

    yeah SW-D1 and SW-D2 are a little confusing in that regard, but basically they are ganged, so their both open or both closed, and if they are closed the DAC blocks must be shut down.

    I'll get something ready for you and send it along.

    best regards,
    -Steve Wilson
  • Christoffer,

    Do you want the AIC3101 to generate the BCLK and Wclk? or will the processor be doing that?

    regarding sampling rate, if I set it up for 48khz is that ok?

    best regards,
    -Steve
  • Okay! Good to know. But shorting the data pins will do the trick. Good to do a sanity check before starting with the signal processing! What do you recommend? Are there any pros or cons for generating the BCLK and WCLK by the FPGA? To me it seems best to do that AIC3101! A sample rate at 48kHz is good!

    Kind regards / C
  • Christoffer, 

    Here is the configuration file.  You can copy and paste this into the AIC3101 GUI's command line interface, and press execute.  

    I did test the PLL settings and  DAC side of things, but I admit I ran out of time to test the ADC side. so give it a test and let me know. 

    best regards, 

    -STeve Wilson

    Lund_University_Script.txt
    ###############################################
    # TLV320AIC3101 setup
    ###############################################
    # Created by:Steve Wilson
    # Date:2/9/2018
    # ---------------------------------------------
    # Short Description:
    # - inputs: IN1L,In1R, M2L, M2R 
    # - Outputs: HPROUT, HPLOUT
    # - Settings: 16 bit word length, fs= 48khz, I2S format, Master mode
    # 
    #
    #
    ###############################################
    
    ###############################################
    # Software Reset
    ###############################################
    #
    # Select Page 0
    w 30 00 00
    #
    # Initialize the device through software reset
    w 30 01 01
    #
    # Delay 100mS
    d 100
    ###############################################
    
    ###############################################
    # Clock Settings
    # ---------------------------------------------
    # The codec receives: MCLK = 12Mhz or 16Mhz (see comments in this section)
    # WCLK = 48 kHz,  Slave mode. 
    ###############################################
    #
    # Select Page 0
    w 30 00 00
    #
    # BLOCK BELOW FOR 12MHz
    #-----------------------------------------------------------#
    # Note: Program PLL coefficients first, then enable PLL
    # PLL P value = 1
    w 30 03 01
    #
    # PLL J value = 8 
    w 30 04 20 
    #
    # PLL D value = 1920
    w 30 05 1E 00
    #
    # PLL R value = 1 (this is default value so command is commented out)
    # W 30 0b 01 
    #
    # Enable PLL
    w 30 03 81
    #
    # Fs ref = 48k, Left_Dac path plays left channel data, Right Dac plays right channel data
    w 30 07 0a
    #
    #------------------------------------------------------------#
    #
    #
    # BLOCK BELOW FOR 16MHz
    #------------------------------------------------------------#
    # Note: Program PLL coefficients first, then enable PLL
    # PLL P value = 1
    #w 30 03 01
    #
    # PLL J value = 6 
    #w 30 04 18 
    #
    # PLL D value = 1440
    #w 30 05 16 80
    #
    # PLL R value = 1 (this is default value so command is commented out)
    # W 30 0b 01 
    #
    # Enable PLL
    #w 30 03 81
    #
    # Fs ref = 48k, Left_Dac path plays left channel data, Right Dac plays right channel data
    #w 30 07 0a
    #------------------------------------------------------------#
    
    
    ###############################################
    
    ###############################################
    # Audio Settings 
    ###############################################
    #
    # bclk and Wclk are outputs (master mode)
    w 30 08 c0
    # I2S mode, 16 bit word length, 
    w 30 09 00
    
    ###############################################
    # Input setup
    ###############################################
    #
    # Left PGA is not muted, gain = 0dB
    w 30 0f 00
    #
    # Right PGA is not muted, gain = 0dB
    w 30 10 00
    #
    #------------
    # Enable Mic/line2L and route to LEFT ADC PGA mix
    w 30 11 0f
    #
    # Enable Mic/line2R and route to RIGHT ADC PGA mix
    w 30 12 f0
    #
    #-------------
    # Enable Line1L as Single ended, and set input level to 0dB (turn on ADC after all inputs are connected)
    w 30 13 00
    # for differential input, comment out above line and uncomment the below line
    # w 30 13 10 
    
    # Enable Line1R as Single ended connect to Right ADC PGA, and set input level to 0dB (turn on ADC after all inputs are connected)
    w 30 16 00
    # for differential input, comment out above line and uncomment the below line
    # w 30 16 10
    
    # enable ADCS (make sure the differential/se matches the configuration above
    w 30 13 04
    w 30 16 04
    
    
    ###############################################
    # Output setup
    ###############################################
    
    # Left and right DAC power up, HPLCOM is configured as SE output 
    w 30 25 e0
    #
    # HPRCOM is configured as SE output 
    w 30 26 10 
    # DAC_L1 path is routed to HPLOUT, gain = 0dB
    w 30 2f 80
    #
    # DAC_R1 path is routed to HPROUT, gain = 0
    w 30 40 80
    #
    # HPLOUT level = 0dB, Muted, all gains have been applied, power up
    w 30 33 01
    # HPROUT level = 0dB, Muted, all gains have been applied, power up
    w 30 41 01
    
    # LEFT daC unmuted, gain =0dB
    w 30 2b 00
    #
    #right dac unmuted, gain = 0dB
    w 30 2c 00
    #
    # unmmute hPLOUT 
    w 30 33 09
    #
    # unmute HPRout
    w 30 41 09
    

  • Thanks alot!

    I only have one problem. I'm unable to install that software. Are there any newer versions?

    Kind regards / Christoffer

  • Christoffer,

    Unfortunately no, which version of windows are you using?

    -Steve
  • actually, You could Download Pure path console 3, and use the I2C master program.

    Purepath Console

    I2C master is a simple I2C interface for most of TI's audio portfolio.  download that if you cannot get the AIC3101 GUI

  • I'm running win 10.

    / Christoffer

  • Christoffer, 

    Windows 10 should be compatible with the GUI.  You would need to install the USB-MODEVM Windows XP/Vista/7 Driver 

    can you tell me more about the instal problem?

    -STeve

  • I get this error message:

    Microsoft Visual C++ Runtime Library

    Runtime Error!

    Program:
    rs)ChristoffernDesktop\TLV320AIC810xEVM_v1.0.15etup.exe

    This application has requested the Runtime to terminate it in
    an unusual way.
    Please contact the application's support team for more
    information.

    So do I need to install the drivers to run the GUI?

    / C
  • Christoffer,

    You do need to install the drivers. But don't recall that not having them would prevent you from installing the GUI. try installing the drivers first, and see if that helps.

    installing Purepath console 3 would be the other option. that is our new GUI platform for all audio devices, and it has a generic I2C interface that should recognize the USB-Mod_EVM motherboard.

    best regards,
    -Steve Wilson
  • Christoffer,

    have you been able to install the GUI or Purepath Console 3?

    best regards,
    -Steve Wilson
  • Hi!

    Sorry for my late reply. I have made a request for accessing the Purepath Console 3 and now I am waiting for the response. I haven't been able to install the older GUI. To be honest I haven't had enough time to dig into why or whats wrong...

    But I have given two students the pcb's with the codec and som other stuff. I have only checked the basic functionality (sending some bytes and recieving ack's) of the codec.  I'll let you know when the students report back!

    Thanks again for the help! 

    / C

  • Christoffer,

    you can also try to download the GUI for the TLV320AIC3254. This GUI has a universal command line interface that will also work with the AIC3101. You can copy and paste the script i sent into the command line window and execute it.

    That GUI is a little more recent than the AIC3101 GUI but its still dated.

    best regards,
    -Steve Wilson
  • HI!

    Do you mean the PurePath™ Studio Graphical Development Environment? If so I also need to request access for it and the my request for PurePath Console Graphical Development Suite was denied...

    Also, the I2C slave address that was given in the config file was 0x30 but it is 0x18 for the TLV320AIC3101. Are the register addresses and values correct?

    Kind regards / Christoffer
  • Christoffer,

    Pure path console. request it again, and make sure you fill in all of the fields. there are occasions where users get denied access because of that.

    Regarding the addressing, check out page 41 of the datasheet.

    "After the master issues a START condition, it sends a byte that indicates which slave device it wants to
    communicate with. This byte is called the address byte. Each device on an I2C bus has a unique 7-bit address to
    which it responds. (Slaves can also have 10-bit addresses; see the I2C specification for details.) The master
    sends an address in the address byte, together with a bit that indicates whether it wishes to read from or write to
    the slave device."

    so the address gets a 0 tagged on the LSB. That shifted value is 0x30.
    Its a little confusing I'll grant you, but it makes sense.

    Best regards,
    -Steve
  • Hi!

    Sorry regarding the address. My bad. To many projects at the same time. On the other hand the initialization of the TLV was successfully done! Now the students will have a very cool thing to play with! . I also don't think I need the GUI.  Thanks for all the help. The support from you guys is really nice. It is much appreciated!

    I will mark the "This resolved my issue". I remember that i forgot that the last time...

    Kind regards / Christoffer