Other Parts Discussed in Thread: TMS320C6748
Tool/software: Code Composer Studio
Good Afternoon,
I have a TMS320C6748 LCDK that I am attempting to achieve a 96kHz sampling rate on this unit. However, I have not been able to do such. I have been able to achieve a 48kHz sampling rate however, when trying to get a 96kHz sampling rate I get nothing but I get silence from the codec when generating a sine wave.
Q=4
PLL Disabled
Dual Rate Mode Enabled
Register 2: 00000000
Register 7: 01101010
Register 3: 00100010
WCLK: 96kHz
MCLK: 24.576kHz
BCLK: 3.049MHz
I've also tried
Q=2
PLL Disabled
Dual Rate Mode Enabled
Register 2: 00000000
Register 7: 00001010
Register 3: 00010010
WCLK: 96kHz
MCLK: 24.576kHz
BCLK: 3.049MHz
In both of these cases I have CLKDIV_IN to be set to MCLK which is 24.576MHz
Either of these seem like the correct setup according to some of the help provided here on the forum already but I haven't had luck with either of these.