Other Parts Discussed in Thread: PCM5122
Hi
As the customer use case, changing cut off frequency of LPF (Butterworth2) while in DAC running is considered.
There are some questions as follows.
I would appreciate if you could answer them.
[1]
A CRAMA/B and coefficient buffer-A/B are the same thing.
Is it correct?
[2]
Does the page structure of CRAM A correspond to that of CRAM B?
(e.g. Page 44(CRAMA) <-> Page 62(CRAMB), Page 45(CRAMA) <-> Page 63(CRAMB), …)
[3]
Is following understanding correct?
In adaptive mode:
CRAM A : I2C is accessible only in standby mode and DSP is accessible only in run state.
CRAM B : I2C is accessible only in run state and DSP is accessible only in standby mode.
Not in adaptive mode:
Both CRAM A and B are accessible only in I2C in standby mode. None of CRAM is accessible from I2C in run state.
[4]
If cutoff of LPF is changed by I2C while in run state, should we need to switch active CRAM from CRAM A to CRAM B using ACSW bit before I2C access?
Please tell us if there is recommended procedure.
BestRegards