TLV320AIC3104: Disconnect all inputs of the TLV320AIC3104, still have a waveform at the i2s output, and the output has a very small sharp sound

Sherry,

can you give more information about this "sharp sound"?

One thing that the user could do is Enable the AGC, and enable the noise gate function.

best regards,
-Steve Wilson

Hi Steve,

I will ask the customer for more information, thanks for your reply!

Sherry 

Thanks Sherry,

Any measurements would be useful too, it would be good to know what this "sharp sound" actually is.

Also can you explain what you mean by "when there is no input connected"? are you talking about the digital input? or the Analog inputs?

if you can get their register configurations as well as an explanation of which inputs/outputs they are using that would be great.

best regards,
-Steve Wilson

Hi Steve,

The analog input and digital input are all disconnected. The output still has a waveform. The output will hear a very small and sharp sound (when the clock configuration is correct and the input is connected, the sound will be collected) {26, 0x00}.

AGC is not used, they tried to open AGC but no significant improvement.

The configuration is as follows. The clock and redundancy configuration are not attached.

{17, 0x0f}, //IN2l enable
{18, 0xf0}, //IN2r LINE2 enable

{19, 0x04}, //MIC1LP/LINE1LP is configured for single-ended mode 1: Powered by left ADC channel

{22, 0x04}, //0: MIC1RP/LINE1RP is configured for single-ended mode. 1: Right ADC channel is powered.

{46, 0x80}, //PGA_L to HPLOUT
{47, 0x80}, //DAC_L1 to HPLOUT
{51, 0x0d}, //HPLOUT output level control register

{63, 0x80}, ///PGA_R to HPROUT

{64, 0x80}, //DAC_R1 to HPROUT
{65, 0x0d}, //HPROUT output level control register

Ps: there is isolation between analog input and digital input.

Hi Sherry,

What is their data format/frequencies? do they use the PLL in the Codec? I don't see any configuration for the clocks.

best regards,
-Steve Wilson