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TLV320AIC3100: TLV320AIC3100IRHBR

Part Number: TLV320AIC3100

Dear TI support team,

I encounter problem to config the biquad for ADC block at EVB level. Below is the step that I config. P/S:  I did run a Init script before I run my own command.

i i2c

# Go to page 0
w 30 00 00
d 100

# Read the ADC flag bit, then disable the ADC
r 30 51 01
d 100
w 30 51 00
d 100
r 30 51 01
d 100

# Read the ADC PRB, then change the PRB to PRB_5 (with 6 biquad)
r 30 3d 01
d 100
w 30 3d 05
d 100
r 30 3d 01
d 100

# Go to page 4, read the biquad coefficient, then write the biquad coefficient
w 30 00 04
d 100

r 30 0e 0a
d 100

w 30 0e 2f
d 10
> 3d
d 100

r 30 0e 0a
d 100

Below is the return value that I get:

r 30 51 01:
80
r 30 51 01:
00
r 30 3D 01:
04
r 30 3D 01:
05
r 30 0E 0A:
7F FF 00 00 00 00 00 00 00 00
r 30 0E 0A:
3D 80 08 00 84 84 00 80 04 00

I not expecting it return "08 00 84 84 00 80 04 00". May I know any config that I overlook?  I did try to check on the register inspector, apparently the register also not reflect the register that I write.  

Below is details regarding my EVM:

EVM info: AIC3100 EVM (ACEV-1B)